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1.发明申请公开(公告)号：US20140264655A1
公开(公告)日：2014-09-18
申请号：US14061152
申请日：2013-10-23
Applicant: InvenSense, Inc.
Inventor： Kirt Reed WILLIAMS , Kegang HUANG , Wencheng XU , Jongwoo SHIN , Martin LIM
CPC classification number: B81B3/001 , B81C2201/115
Abstract: In an integrated MEMS device, moving silicon parts with smooth surfaces can stick together if they come into contact. By roughening at least one smooth surface, the effective area of contact, and therefore surface adhesion energy, is reduced and hence the sticking force is reduced. The roughening of a surface can be provided by etching the smooth surfaces in gas, plasma, or liquid with locally non-uniform etch rate. Various etch chemistries and conditions lead to various surface roughness.
Abstract translation: 在集成的MEMS器件中，移动具有光滑表面的硅部件如果接触则可以粘在一起。 通过使至少一个光滑表面粗糙化，有效的接触面积以及因此的表面附着能减少，因此粘附力降低。 可以通过以局部不均匀蚀刻速率蚀刻气体，等离子体或液体中的光滑表面来提供表面的粗糙化。 各种蚀刻化学和条件导致各种表面粗糙度。
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2.发明申请公开(公告)号：US20170073217A1
公开(公告)日：2017-03-16
申请号：US15366495
申请日：2016-12-01
Applicant: INVENSENSE, INC.
Inventor： Peter SMEYS , Jong Il SHIN , Jongwoo SHIN
CPC classification number: B81B7/0041 , B81B2207/012 , B81B2207/094 , B81C1/00293 , B81C2201/013 , B81C2201/0133 , B81C2201/016 , B81C2203/035 , B81C2203/0792
Abstract: A MEMS device is disclosed. The MEMS device includes a first substrate. At least one structure is formed within the first substrate. The first substrate includes at least one first conductive pad thereon. The MEMS device also includes a second substrate. The second substrate includes a passivation layer. The passivation layer includes a plurality of layers. A top layer of the plurality of layers comprises an outgassing barrier layer. At least one second conductive pad and at least one electrode are coupled to the top layer. At least one first conductive pad is coupled to the at least one second conductive pad.
Abstract translation: 公开了MEMS器件。 MEMS器件包括第一衬底。 在第一基板内形成至少一个结构。 第一衬底包括至少一个第一导电焊盘。 MEMS器件还包括第二衬底。 第二基板包括钝化层。 钝化层包括多个层。 多个层的顶层包括除气阻挡层。 至少一个第二导电焊盘和至少一个电极耦合到顶层。 至少一个第一导电焊盘耦合到所述至少一个第二导电焊盘。
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公开(公告)号：US20160376143A1
公开(公告)日：2016-12-29
申请号：US14935296
申请日：2015-11-06
Applicant: InvenSense, Inc.
Inventor： Jongwoo SHIN , Houri JOHARI-GALLE , Martin LIM , Joseph SEEGER
CPC classification number: B81B3/0089 , B81B7/0038 , B81B7/02 , B81B2201/0235 , B81B2201/0242 , B81B2203/0315 , B81B2203/04 , B81B2207/07 , B81C1/00206 , B81C2201/016 , B81C2203/035
Abstract: A MEMS device and method for providing a MEMS device are disclosed. In a first aspect, the MEMS device comprises a first substrate and a second substrate coupled to the first substrate forming a sealed enclosure. A moveable structure is located within the sealed enclosure. An outgassing layer is formed on the first or second substrates and within the sealed enclosure. A first conductive layer is disposed between the moveable structure and the outgassing layer, wherein the first conductive layer allows outgassing species to pass therethrough.
Abstract translation: 公开了一种用于提供MEMS器件的MEMS器件和方法。 在第一方面，MEMS装置包括第一基板和耦合到第一基板的第二基板，形成密封外壳。 可移动的结构位于密封的外壳内。 在第一或第二基板上和密封的外壳内形成除气层。 第一导电层设置在可移动结构和除气层之间，其中第一导电层允许除气物质通过其中。
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公开(公告)号：US20150076631A1
公开(公告)日：2015-03-19
申请号：US14225275
申请日：2014-03-25
Applicant: InvenSense, Inc.
Inventor： Jongwoo SHIN , Kirt Reed WILLIAMS , Cerina ZHANG , Kuolung (Dino) LEI
CPC classification number: B81C1/00103 , B81C2201/0112 , B81C2201/0132 , B81C2201/0133
Abstract: A MEMS (microelectromechanical systems) structure comprises a MEMS wafer. A MEMS wafer includes a cap with cavities bonded to a structural layer through a dielectric layer disposed between the cap and the structural layer. Unique configurations of MEMS devices and methods of providing such are set forth which provide for, in part, creating rounded, scalloped or chamfered MEMS profiles by shaping the etch mask photoresist reflow, by using a multi-step deep reactive ion etch (DRIE) with different etch characteristics, or by etching after DRIE.
Abstract translation: MEMS（微机电系统）结构包括MEMS晶片。 MEMS晶片包括具有通过布置在盖和结构层之间的电介质层结合到结构层的空腔的盖。 阐述了MEMS器件的独特结构和提供这些器件的方法，其部分地通过使用多步骤深反应离子蚀刻（DRIE）形成蚀刻掩模光致抗蚀剂回流来形成圆形，扇形或倒角的MEMS轮廓， 不同的蚀刻特性，或通过DRIE后的蚀刻。
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5.发明申请CMOS-MEMS INTEGRATED DEVICE INCLUDING A CONTACT LAYER AND METHODS OF MANUFACTURE 有权包含接触层的CMOS-MEMS集成器件及其制造方法公开(公告)号：US20160362296A1
公开(公告)日：2016-12-15
申请号：US14738645
申请日：2015-06-12
Applicant: InvenSense, Inc.
Inventor： Daesung LEE , Jongwoo SHIN , Jong Il SHIN , Peter SMEYS
IPC: B81C1/00
CPC classification number: B81C1/00301 , B81C2201/013 , B81C2203/036 , H01L21/76877 , H01L21/76898 , H01L23/5226
Abstract: A method for forming a MEMS device is disclosed. The MEMS device includes a MEMS substrate and a base substrate. The MEMS substrate, where includes a handle layer, a device layer and an insulating layer in between. The method includes the sequential steps of: providing a standoff on the device layer; etching a via through the device layer and the insulating layer; providing a contact layer within the via, wherein the contact layer provides electrical connection between the device layer and the handle layer; providing a bonding layer on the standoff; and bonding the bonding layer to pads on the base substrate.
Abstract translation: 公开了一种用于形成MEMS器件的方法。 MEMS器件包括MEMS衬底和基底衬底。 MEMS衬底，其中包括手柄层，器件层和绝缘层。 该方法包括以下顺序步骤：在设备层上提供间隔; 通过器件层和绝缘层蚀刻通孔; 在所述通孔内提供接触层，其中所述接触层在所述器件层和所述手柄层之间提供电连接; 在支架上提供粘合层; 以及将所述结合层粘合到所述基底基板上的焊盘。
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Patent Agency Ranking
6.发明申请公开(公告)号：US20160221819A1
公开(公告)日：2016-08-04
申请号：US14748012
申请日：2015-06-23
Applicant: InvenSense, Inc.
Inventor： Peter SMEYS , Jong Il SHIN , Jongwoo SHIN
CPC classification number: B81B7/0041 , B81B2207/012 , B81B2207/094 , B81C1/00293 , B81C2201/013 , B81C2201/0133 , B81C2201/016 , B81C2203/035 , B81C2203/0792
Abstract: A MEMS device is disclosed. The MEMS device includes a first substrate. At least one structure is formed within the first substrate. The first substrate includes at least one first conductive pad thereon. The MEMS device also includes a second substrate. The second substrate includes a passivation layer. The passivation layer includes a plurality of layers. A top layer of the plurality of layers comprises an outgassing barrier layer. At least one second conductive pad and at least one electrode are coupled to the top layer. At least one first conductive pad is coupled to the at least one second conductive pad.
Abstract translation: 公开了MEMS器件。 MEMS器件包括第一衬底。 在第一基板内形成至少一个结构。 第一衬底包括至少一个第一导电焊盘。 MEMS装置还包括第二基板。 第二基板包括钝化层。 钝化层包括多个层。 多个层的顶层包括除气阻挡层。 至少一个第二导电焊盘和至少一个电极耦合到顶层。 至少一个第一导电焊盘耦合到所述至少一个第二导电焊盘。
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公开(公告)号：US20160075554A1
公开(公告)日：2016-03-17
申请号：US14850860
申请日：2015-09-10
Applicant: InvenSense, Inc.
Inventor： Anatole HUANG , Jongwoo SHIN , Peter SMEYS , Cerina ZHANG , Jong Il SHIN
Abstract: A MEMS device having a channel configured to avoid particle contamination is disclosed. The MEMS device includes a MEMS substrate and a base substrate. The MEMS substrate includes a MEMS device area, a seal ring and a channel. The seal ring provides for dividing the MEMS device area into a plurality of cavities, wherein at least one of the plurality of cavities includes one or more vent holes. The channel is configured between the one or more vent holes and the MEMS device area. Preferably, the channel is configured to minimize particles entering the MEMS device area directly. The base substrate is coupled to the MEMS device substrate.
Abstract translation: 公开了具有被配置为避免颗粒污染的通道的MEMS器件。 MEMS器件包括MEMS衬底和基底衬底。 MEMS衬底包括MEMS器件区域，密封环和沟道。 密封环提供将MEMS器件区域分成多个空腔，其中多个空腔中的至少一个包括一个或多个通气孔。 通道配置在一个或多个通气孔和MEMS器件区域之间。 优选地，通道被配置为使直接进入MEMS器件区域的颗粒最小化。 基底衬底耦合到MEMS器件衬底。
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公开(公告)号：US20150336792A1
公开(公告)日：2015-11-26
申请号：US14590839
申请日：2015-01-06
Applicant: InvenSense, Inc.
Inventor： Kegang HUANG , Jongwoo SHIN , Martin LIM , Michael Julian DANEMAN , Joseph SEEGER
IPC: B81B7/00
CPC classification number: B81C1/00301 , B81B7/0064 , B81B2207/098 , B81C1/00269 , B81C2203/0118 , B81C2203/019 , B81C2203/031
Abstract: A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the first semiconductor layer and the second semiconductor layer, and etching at least one via through the second semiconductor layer and the dielectric layer and depositing a conductive material on the second semiconductor layer and filling the at least one via. Forming a MEMS wafer also includes patterning and etching the conductive material to form one standoff and depositing a germanium layer on the conductive material, patterning and etching the germanium layer, and patterning and etching the second semiconductor layer to define one MEMS structure. The method also includes bonding the MEMS wafer to a base substrate.
Abstract translation: 公开了一种在集成MEMS器件中制造电连接的方法。 该方法包括形成MEMS晶片。 形成MEMS晶片包括在第一半导体层中形成一个空腔，将第一半导体层与设置在第一半导体层和第二半导体层之间的电介质层结合到第二半导体层，并且通过第二半导体蚀刻至少一个通孔 层和介电层，并在第二半导体层上沉积导电材料并填充至少一个通孔。 形成MEMS晶片还包括图案化和蚀刻导电材料以形成一个间隔并在导电材料上沉积锗层，图案化和蚀刻锗层，以及图案化和蚀刻第二半导体层以限定一个MEMS结构。 该方法还包括将MEMS晶片接合到基底基板。
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公开(公告)号：US20150311178A1
公开(公告)日：2015-10-29
申请号：US14696994
申请日：2015-04-27
Applicant: InvenSense, Inc.
Inventor： Jong Il SHIN , Peter SMEYS , Jongwoo SHIN
IPC: H01L23/00
CPC classification number: H01L24/83 , B81B2207/012 , B81C1/00238 , B81C2203/019 , B81C2203/035 , B81C2203/0792 , H01L2224/83065 , H01L2224/83805 , H01L2224/83951
Abstract: Methods for bonding two wafers are disclosed. In one aspect, a first wafer includes an integrated circuit and the second wafer including a MEMS device. The method comprises depositing a bond pad on a metal on the first wafer and sequentially bonding the first wafer to the second wafer utilizing first and second temperatures. The second wafer is bonded to the bond pad at the first temperature and the bond pad and the metal are bonded at the second temperature. In another aspect, a first wafer including an integrated circuit, the second wafer includes a MEMS device. The method comprises depositing a bond pad on a metal on one of the first wafer and the second wafer and bonding the first wafer to the second wafer at a first temperature via a direct bond interface. The method includes bonding the bond pad to the metal at a second temperature.
Abstract translation: 公开了粘合两个晶片的方法。 在一个方面，第一晶片包括集成电路，第二晶片包括MEMS器件。 该方法包括在第一晶片上的金属上沉积接合焊盘，并且利用第一和第二温度将第一晶片顺序地结合到第二晶片。 第二晶片在第一温度下接合到接合焊盘，并且接合焊盘和金属在第二温度下结合。 在另一方面，包括集成电路的第一晶片，所述第二晶片包括MEMS器件。 该方法包括在第一晶片和第二晶片之一上的金属上沉积接合焊盘，并且通过直接键合界面在第一温度下将第一晶片接合到第二晶片。 该方法包括在第二温度下将接合焊盘接合到金属。
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公开(公告)号：US20140213007A1
公开(公告)日：2014-07-31
申请号：US14033366
申请日：2013-09-20
Applicant: InvenSense, Inc.
Inventor： Kegang HUANG , Jongwoo SHIN , Martin LIM , Michael Julian DANEMAN , Joseph SEEGER
IPC: B81C1/00
CPC classification number: B81C1/00301 , B81B7/0064 , B81B2207/098 , B81C1/00269 , B81C2203/0118 , B81C2203/019 , B81C2203/031
Abstract: A method of fabricating electrical connections in an integrated MEMS device is disclosed. The method comprises forming a MEMS wafer. Forming a MEMS wafer includes forming one cavity in a first semiconductor layer, bonding the first semiconductor layer to a second semiconductor layer with a dielectric layer disposed between the first semiconductor layer and the second semiconductor layer, and etching at least one via through the second semiconductor layer and the dielectric layer and depositing a conductive material on the second semiconductor layer and filling the at least one via. Forming a MEMS wafer also includes patterning and etching the conductive material to form one standoff and depositing a germanium layer on the conductive material, patterning and etching the germanium layer, and patterning and etching the second semiconductor layer to define one MEMS structure. The method also includes bonding the MEMS wafer to a base substrate.
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