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    Apparatus for improving performance of field programmable gate arrays and associated methods
    1.
    发明授权
    Apparatus for improving performance of field programmable gate arrays and associated methods 有权
    用于提高现场可编程门阵列性能的装置及相关方法

    公开(公告)号：US08698516B2

    公开(公告)日：2014-04-15

    申请号：US13214144

    申请日：2011-08-19

    申请人： Irfan Rahim ,  Jeffrey T. Watt ,  Richard G. Cliff ,  Andy L. Lee ,  Ping-Chen Liu

    发明人： Irfan Rahim ,  Jeffrey T. Watt ,  Richard G. Cliff ,  Andy L. Lee ,  Ping-Chen Liu

    IPC分类号： H03K17/16

    CPC分类号： H03K19/17784 ,  H03K19/17792

    摘要： A field programmable gate array (FPGA) includes a set of monitor circuits adapted to provide indications of process, voltage, and temperature for at least one circuit in the FPGA, and a controller adapted to derive a range of body-bias values for the at least one circuit from the indications of process, voltage, and temperature for the at least one circuit. The FPGA further includes a body-bias generator adapted to provide a body-bias signal to at least one transistor in the at least one circuit. The body-bias signal has a value within the range of body-bias values.

    摘要翻译： 现场可编程门阵列（FPGA）包括一组监视器电路，其适于为FPGA中的至少一个电路提供过程，电压和温度的指示，以及控制器，其适于导出所述at的至少一个电路的体偏值的范围 用于至少一个电路的过程，电压和温度的指示的至少一个电路。 FPGA还包括体偏置发生器，其适于向至少一个电路中的至少一个晶体管提供体偏置信号。 体偏置信号具有在体偏值范围内的值。

    APPARATUS FOR IMPROVING PERFORMANCE OF FIELD PROGRAMMABLE GATE ARRAYS AND ASSOCIATED METHODS
    2.
    发明申请
    APPARATUS FOR IMPROVING PERFORMANCE OF FIELD PROGRAMMABLE GATE ARRAYS AND ASSOCIATED METHODS 有权
    改进现场可编程门阵列性能的方法及相关方法

    公开(公告)号：US20130043902A1

    公开(公告)日：2013-02-21

    申请号：US13214144

    申请日：2011-08-19

    申请人： Irfan Rahim ,  Jeffrey T. Watt ,  Richard G. Cliff ,  Andy L. Lee ,  Ping-Chen Liu

    发明人： Irfan Rahim ,  Jeffrey T. Watt ,  Richard G. Cliff ,  Andy L. Lee ,  Ping-Chen Liu

    IPC分类号： H03K19/177

    CPC分类号： H03K19/17784 ,  H03K19/17792

    摘要： A field programmable gate array (FPGA) includes a set of monitor circuits adapted to provide indications of process, voltage, and temperature for at least one circuit in the FPGA, and a controller adapted to derive a range of body-bias values for the at least one circuit from the indications of process, voltage, and temperature for the at least one circuit. The FPGA further includes a body-bias generator adapted to provide a body-bias signal to at least one transistor in the at least one circuit. The body-bias signal has a value within the range of body-bias values.

    摘要翻译： 现场可编程门阵列（FPGA）包括一组监视器电路，其适于为FPGA中的至少一个电路提供过程，电压和温度的指示，以及控制器，其适于导出针对 用于至少一个电路的过程，电压和温度的指示的至少一个电路。 FPGA还包括体偏置发生器，其适于向至少一个电路中的至少一个晶体管提供体偏置信号。 体偏置信号具有在体偏值范围内的值。

    Apparatus for configuring performance of field programmable gate arrays and associated methods
    3.
    发明授权
    Apparatus for configuring performance of field programmable gate arrays and associated methods 有权
    用于配置现场可编程门阵列性能和相关方法的装置

    公开(公告)号：US08461869B1

    公开(公告)日：2013-06-11

    申请号：US13214147

    申请日：2011-08-19

    申请人： Irfan Rahim ,  Andy L. Lee ,  Bruce B. Pedersen ,  Jeffrey T. Watt ,  Mao Du ,  Richard G. Cliff

    发明人： Irfan Rahim ,  Andy L. Lee ,  Bruce B. Pedersen ,  Jeffrey T. Watt ,  Mao Du ,  Richard G. Cliff

    IPC分类号： H03K19/003

    CPC分类号： H03K19/003 ,  H03K19/17784

    摘要： An apparatus includes a temperature sensor, a voltage regulator, and a field programmable gate array (FPGA). The temperature sensor and the voltage regulator are adapted, respectively, to provide a temperature signal, and to provide at least one output voltage. The FPGA includes at least one circuit adapted to receive the at least one output voltage of the voltage regulator, and a set of monitor circuits adapted to provide indications of process and temperature for the at least one circuit. The FPGA further includes a controller adapted to derive a body-bias signal and a voltage-level signal from the temperature signal, from the indications of process and temperature for the at least one circuit, and from the at least one output voltage of the voltage regulator. The controller is further adapted to provide the body-bias signal to at least one transistor in the at least one circuit, and to provide the voltage-level signal to the voltage regulator.

    摘要翻译： 一种装置包括温度传感器，电压调节器和现场可编程门阵列（FPGA）。 温度传感器和电压调节器分别适于提供温度信号，并提供至少一个输出电压。 FPGA包括适于接收电压调节器的至少一个输出电压的至少一个电路，以及适于提供至少一个电路的过程和温度指示的一组监视器电路。 FPGA还包括控制器，其适于从温度信号，从至少一个电路的处理和温度指示以及电压的至少一个输出电压导出体偏置信号和电压电平信号 调节器 所述控制器还适于将所述体偏置信号提供给所述至少一个电路中的至少一个晶体管，并且向所述电压调节器提供所述电压电平信号。

    Multiple size memories in a programmable logic device
    8.
    发明授权
    Multiple size memories in a programmable logic device 有权
    可编程逻辑器件中的多个大小的存储器

    公开(公告)号：US07236008B1

    公开(公告)日：2007-06-26

    申请号：US11611122

    申请日：2006-12-14

    申请人： Richard G. Cliff ,  Srinivas T. Reddy ,  Andy L. Lee ,  David Lewis

    发明人： Richard G. Cliff ,  Srinivas T. Reddy ,  Andy L. Lee ,  David Lewis

    IPC分类号： G06F7/38 ,  H03K19/177

    CPC分类号： H03K19/1776 ,  H03K19/17728

    摘要： Circuits, methods, and apparatus that provide integrated circuits having memories with multiple sizes. The memories may be dedicated embedded memories, or they may be distributed memories formed using memories or lookup tables in logic elements or other appropriate circuits. Configuration bits not needed by logic elements used for distributed memories can be used for data storage as well. These various memories may be combined or otherwise linked or chained together in different combinations to form larger memories of varying sizes.

    摘要翻译： 提供具有多种尺寸的存储器的集成电路的电路，方法和装置。 存储器可以是专用的嵌入式存储器，或者它们可以是使用逻辑元件或其他适当电路中的存储器或查找表形成的分布式存储器。 用于分布式存储器的逻辑元件不需要的配置位也可以用于数据存储。 这些各种存储器可以以不同的组合组合或以其他方式链接或链接在一起以形成不同大小的较大存储器。