公开(公告)号：US20170271518A1

公开(公告)日：2017-09-21

申请号：US15459658

申请日：2017-03-15

Applicant: JOLED Inc. ,  Japan Display Inc.

Inventor： Shinichi USHIKURA ,  Ayumu SATO

IPC: H01L29/786 ,  H01L21/02 ,  H01L23/31 ,  H01L29/51

CPC classification number: H01L29/7869 ,  H01L21/02123 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/02271 ,  H01L23/3171

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate, an oxide semiconductor layer, a gate insulating film, a gate electrode, a first insulating film and a second insulating film. The oxide semiconductor layer is provided on the insulating substrate and includes first and second low-resistance regions and a high-resistance region between the first and second low-resistance regions. The gate insulating film is provided on the high-resistance region of the oxide semiconductor layer. The gate electrode is provided on the gate insulating film. The first insulating film is provided above the gate electrode, gate insulating film and first and second low-resistance regions of the oxide semiconductor layer, and contains at least fluorine. The second insulating film is provided on the first insulating film, and contains aluminum.

公开(公告)号：US20170278974A1

公开(公告)日：2017-09-28

申请号：US15468042

申请日：2017-03-23

Applicant: JOLED INC.

Inventor： Toshiaki YOSHITANI ,  Shinichi USHIKURA

IPC: H01L29/786 ,  H01L27/32 ,  H01L27/12 ,  H01L29/49 ,  H01L29/51

CPC classification number: H01L29/7869 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/3262 ,  H01L29/49 ,  H01L29/4908 ,  H01L29/51 ,  H01L29/512 ,  H01L29/517 ,  H01L29/518

Abstract: A thin film transistor includes an oxide semiconductor layer including a channel region, and a source region and a drain region having a resistivity lower than that of the channel region; a gate insulating layer disposed on the channel region of the oxide semiconductor layer; a gate electrode disposed on the gate insulating layer; and an aluminum oxide layer covering the lateral surface of the gate insulating layer, and the source region and the drain region, wherein the gate insulating layer has a multi-layer structure including a first insulating layer and a second insulating layer, and the first insulating layer contains silicon oxide as a main component, and is disposed on and in contact with the channel region.

公开(公告)号：US20170287946A1

公开(公告)日：2017-10-05

申请号：US15466827

申请日：2017-03-22

Applicant: JOLED Inc.

Inventor： Yasunobu HIROMASU ,  Motohiro TOYOTA ,  Shinichi USHIKURA

IPC: H01L27/12 ,  H01L27/02

CPC classification number: H01L27/1225 ,  H01L27/0266 ,  H01L27/1218 ,  H01L27/124 ,  H01L27/1248 ,  H01L27/1255 ,  H01L27/1262 ,  H01L27/127 ,  H01L27/1288 ,  H01L27/3262 ,  H01L27/3265 ,  H01L29/7869 ,  H01L2029/42388

Abstract: According to one embodiment, a semiconductor device includes an insulating substrate including a pixel area and a peripheral circuit area around the pixel area, a first insulating layer which is provided on the insulating substrate and includes at least nitrogen, a second insulating layer at least provided on the first insulating layer of the peripheral circuit area, a first thin-film transistor which is provided above the first insulating layer of the pixel area and includes a first oxide semiconductor layer, and a second thin-film transistor which is provided on the second insulating layer of the peripheral circuit area and includes a second oxide semiconductor layer. The second insulating layer in the pixel area is thinner than that in the peripheral circuit area.