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    Systems and methods for preserving the order of data
    3.
    发明授权
    Systems and methods for preserving the order of data 有权
    用于保存数据顺序的系统和方法

    公开(公告)号：US09178840B2

    公开(公告)日：2015-11-03

    申请号：US13774703

    申请日：2013-02-22

    Applicant: JUNIPER NETWORKS, INC.

    Inventor： Raymond Marcelino Manese Lim ,  Stefan Dyckerhoff ,  Jeffrey Glenn Libby ,  Teshager Tesfaye

    IPC: G06F9/46 ,  H04L12/28 ,  G06F13/00 ,  H04L12/861 ,  G06F12/00 ,  H04L12/721

    CPC classification number: G06F13/1626 ,  G06F9/4881 ,  G06F12/00 ,  G06F13/1663 ,  G06F13/4022 ,  H04L45/62 ,  H04L49/90 ,  H04L49/9094

    Abstract: A device includes an input processing unit and an output processing unit. The input processing unit dispatches first data to one of a group of processing engines, records an identity of the one processing engine in a location in a first memory, reserves one or more corresponding locations in a second memory, causes the first data to be processed by the one processing engine, and stores the processed first data in one of the locations in the second memory. The output processing unit receives second data, assigns an entry address corresponding to a location in an output memory to the second data, transfers the second data and the entry address to one of a group of second processing engines, causes the second data to be processed by the second processing engine, and stores the processed second data to the location in the output memory.

    Abstract translation: 一种装置包括输入处理单元和输出处理单元。 输入处理单元将第一数据分配到一组处理引擎中的一个，将一个处理引擎的标识记录在第一存储器中的位置中，在第二存储器中保留一个或多个对应位置，使得第一数据被处理 并且将经处理的第一数据存储在第二存储器中的一个位置中。 输出处理单元接收第二数据，将对应于输出存储器中的位置的入口地址分配给第二数据，将第二数据和入口地址传送给一组第二处理引擎，使得第二数据被处理 并且将处理的第二数据存储到输出存储器中的位置。

    CENTRALIZED MEMORY ALLOCATION WITH WRITE POINTER DRIFT CORRECTION
    8.
    发明申请
    CENTRALIZED MEMORY ALLOCATION WITH WRITE POINTER DRIFT CORRECTION 有权
    具有写入点标签校正的集中存储器分配

    公开(公告)号：US20150052316A1

    公开(公告)日：2015-02-19

    申请号：US14531448

    申请日：2014-11-03

    Applicant: Juniper Networks, Inc.

    Inventor： Rami RAHIM ,  Pradeep S. Sindhu ,  Raymond Marcelino Manese Lim ,  Sreeram Veeragandham ,  David Skinner

    IPC: G06F12/06 ,  G06F12/08

    CPC classification number: G06F12/0684 ,  G06F12/02 ,  G06F12/0813

    Abstract: A system for writing data includes a memory, at least one memory controller and control logic. The memory stores data units. The memory controller receives a write request associated with a data unit and stores the data unit in the memory. The memory controller also transmits a reply that includes an address where the data unit is stored. The control logic receives the reply and determines whether the address in the reply differs from an address included in replies associated with other memory controllers by a threshold amount. When this occurs, the control logic performs a corrective action to bring an address associated with the memory controller back within a defined range.

    Abstract translation: 用于写入数据的系统包括存储器，至少一个存储器控制器和控制逻辑。 内存存储数据单元。 存储器控制器接收与数据单元相关联的写请求，并将数据单元存储在存储器中。 存储器控制器还发送包括存储数据单元的地址的应答。 控制逻辑接收答复并确定答复中的地址是否与包含在与其他存储器控制器相关联的应答中的地址相差阈值。 当这种情况发生时，控制逻辑执行纠正措施以使与存储器控制器相关联的地址返回到定义的范围内。

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