Memory devices and data decision methods
    1.
    发明申请
    Memory devices and data decision methods 有权
    内存设备和数据决策方法

    公开(公告)号:US20090234792A1

    公开(公告)日:2009-09-17

    申请号:US12292539

    申请日:2008-11-20

    IPC分类号: G06N5/00

    CPC分类号: G06N99/005

    摘要: Disclosed are a memory device and a data decision method. The memory device may include a memory cell array, and a decision unit configured to read first data from the memory cell array via a first channel, perform at least one of a hard and soft decision on the first data using a first number of decision levels set based on characteristics of the first channel, read second data from the memory cell array via a second channel, and perform a soft decision on the second data using a second number of decision levels set based on characteristics of the second channel.

    摘要翻译: 公开了一种存储器件和数据判定方法。 存储器装置可以包括存储单元阵列,以及判定单元,被配置为经由第一通道从存储单元阵列读取第一数据,使用第一数量的判定级别对第一数据执行硬判决和软判决中的至少一个 基于第一信道的特性设置,经由第二信道从存储器单元阵列读取第二数据,并且使用基于第二信道的特性设置的第二数量的判定级来对第二数据执行软判决。

    Memory devices and data decision methods
    2.
    发明授权
    Memory devices and data decision methods 有权
    内存设备和数据决策方法

    公开(公告)号:US08200607B2

    公开(公告)日:2012-06-12

    申请号:US12292539

    申请日:2008-11-20

    IPC分类号: G06F17/00 G06N5/02

    CPC分类号: G06N99/005

    摘要: Disclosed are a memory device and a data decision method. The memory device may include a memory cell array, and a decision unit configured to read first data from the memory cell array via a first channel, perform at least one of a hard and soft decision on the first data using a first number of decision levels set based on characteristics of the first channel, read second data from the memory cell array via a second channel, and perform a soft decision on the second data using a second number of decision levels set based on characteristics of the second channel.

    摘要翻译: 公开了一种存储器件和数据判定方法。 存储器装置可以包括存储单元阵列,以及判定单元,被配置为经由第一通道从存储单元阵列读取第一数据,使用第一数量的判定级别对第一数据执行硬判决和软判决中的至少一个 基于第一信道的特性设置,经由第二信道从存储器单元阵列读取第二数据,并且使用基于第二信道的特性设置的第二数量的判定级来对第二数据执行软判决。

    Apparatus and method of memory programming
    3.
    发明授权
    Apparatus and method of memory programming 有权
    存储器编程的装置和方法

    公开(公告)号:US07738293B2

    公开(公告)日:2010-06-15

    申请号:US12213944

    申请日:2008-06-26

    IPC分类号: G11C16/04 G11C29/04

    摘要: A memory programming apparatuses and/or methods are provided. The memory programming apparatus may include a data storage unit, a first counting unit, an index storage unit and/or a programming unit. The data storage unit may be configured to store a data page. The first counting unit may be configured to generate index information by counting a number of cells included in at least one reference threshold voltage state based on the data page. The index storage unit may be configured to store the generated index information. The programming unit may be configured to store the data page in the data storage unit and store the generated index information in the index storage unit. The first counting unit may send the generated index information to the programming unit. The memory programming apparatus can monitor distribution states of threshold voltages in memory cells.

    摘要翻译: 提供了存储器编程设备和/或方法。 存储器编程装置可以包括数据存储单元,第一计数单元,索引存储单元和/或编程单元。 数据存储单元可以被配置为存储数据页。 第一计数单元可以被配置为通过基于数据页计数包括在至少一个参考阈值电压状态中的单元的数量来生成索引信息。 索引存储单元可以被配置为存储所生成的索引信息。 编程单元可以被配置为将数据页存储在数据存储单元中,并将生成的索引信息存储在索引存储单元中。 第一计数单元可以将生成的索引信息发送到编程单元。 存储器编程装置可以监视存储器单元中阈值电压的分布状态。

    Apparatus and method of memory programming
    4.
    发明申请
    Apparatus and method of memory programming 有权
    存储器编程的装置和方法

    公开(公告)号:US20090185417A1

    公开(公告)日:2009-07-23

    申请号:US12213944

    申请日:2008-06-26

    IPC分类号: G11C16/04

    摘要: A memory programming apparatuses and/or methods are provided. The memory programming apparatus may include a data storage unit, a first counting unit, an index storage unit and/or a programming unit. The data storage unit may be configured to store a data page. The first counting unit may be configured to generate index information by counting a number of cells included in at least one reference threshold voltage state based on the data page. The index storage unit may be configured to store the generated index information. The programming unit may be configured to store the data page in the data storage unit and store the generated index information in the index storage unit. The first counting unit may send the generated index information to the programming unit. The memory programming apparatus can monitor distribution states of threshold voltages in memory cells.

    摘要翻译: 提供了存储器编程设备和/或方法。 存储器编程装置可以包括数据存储单元,第一计数单元,索引存储单元和/或编程单元。 数据存储单元可以被配置为存储数据页。 第一计数单元可以被配置为通过基于数据页计数包括在至少一个参考阈值电压状态中的单元的数量来生成索引信息。 索引存储单元可以被配置为存储所生成的索引信息。 编程单元可以被配置为将数据页存储在数据存储单元中,并将生成的索引信息存储在索引存储单元中。 第一计数单元可以将生成的索引信息发送到编程单元。 存储器编程装置可以监视存储器单元中阈值电压的分布状态。

    Apparatus and method of memory programming
    5.
    发明授权
    Apparatus and method of memory programming 有权
    存储器编程的装置和方法

    公开(公告)号:US08279668B2

    公开(公告)日:2012-10-02

    申请号:US12801532

    申请日:2010-06-14

    IPC分类号: G11C16/04

    摘要: A memory programming apparatuses and/or methods are provided. The memory programming apparatus may include a data storage unit, a first counting unit, an index storage unit and/or a programming unit. The data storage unit may be configured to store a data page. The first counting unit may be configured to generate index information by counting a number of cells included in at least one reference threshold voltage state based on the data page. The index storage unit may be configured to store, the generated index information. The programming unit may be configured to store the data page in the data storage unit and store the generated index information in the index storage unit. The first counting unit may send the generated index information to the programming unit. The memory programming apparatus can monitor distribution states of threshold voltages in memory cells.

    摘要翻译: 提供了存储器编程设备和/或方法。 存储器编程装置可以包括数据存储单元,第一计数单元,索引存储单元和/或编程单元。 数据存储单元可以被配置为存储数据页。 第一计数单元可以被配置为通过基于数据页计数包括在至少一个参考阈值电压状态中的单元的数量来生成索引信息。 索引存储单元可以被配置为存储所生成的索引信息。 编程单元可以被配置为将数据页存储在数据存储单元中,并将生成的索引信息存储在索引存储单元中。 第一计数单元可以将生成的索引信息发送到编程单元。 存储器编程装置可以监视存储器单元中阈值电压的分布状态。

    Apparatus and method of memory programming
    6.
    发明申请
    Apparatus and method of memory programming 有权
    存储器编程的装置和方法

    公开(公告)号:US20100254189A1

    公开(公告)日:2010-10-07

    申请号:US12801532

    申请日:2010-06-14

    IPC分类号: G11C16/04

    摘要: A memory programming apparatuses and/or methods are provided. The memory programming apparatus may include a data storage unit, a first counting unit, an index storage unit and/or a programming unit. The data storage unit may be configured to store a data page. The first counting unit may be configured to generate index information by counting a number of cells included in at least one reference threshold voltage state based on the data page. The index storage unit may be configured to store, the generated index information. The programming unit may be configured to store the data page in the data storage unit and store the generated index information in the index storage unit. The first counting unit may send the generated index information to the programming unit. The memory programming apparatus can monitor distribution states of threshold voltages in memory cells.

    摘要翻译: 提供了存储器编程设备和/或方法。 存储器编程装置可以包括数据存储单元,第一计数单元,索引存储单元和/或编程单元。 数据存储单元可以被配置为存储数据页。 第一计数单元可以被配置为通过基于数据页计数包括在至少一个参考阈值电压状态中的单元的数量来生成索引信息。 索引存储单元可以被配置为存储所生成的索引信息。 编程单元可以被配置为将数据页存储在数据存储单元中,并将生成的索引信息存储在索引存储单元中。 第一计数单元可以将生成的索引信息发送到编程单元。 存储器编程装置可以监视存储器单元中阈值电压的分布状态。

    Nonvolatile memory devices having built-in memory cell recovery during block erase and methods of operating same
    7.
    发明授权
    Nonvolatile memory devices having built-in memory cell recovery during block erase and methods of operating same 有权
    在块擦除期间具有内置存储器单元恢复的非易失性存储器件及其操作方法

    公开(公告)号:US08274840B2

    公开(公告)日:2012-09-25

    申请号:US12498508

    申请日:2009-07-07

    IPC分类号: G11C11/34

    CPC分类号: G11C16/16

    摘要: Nonvolatile memory devices include support memory cell recovery during operations to erase blocks of nonvolatile (e.g., flash) memory cells. A nonvolatile memory system includes a flash memory device and a memory controller electrically coupled to the flash memory device. The memory controller is configured to control memory cell recovery operations within the flash memory device by issuing a first instruction(s) to the flash memory device that causes erased memory cells in the block of memory to become at least partially programmed memory cells and then issuing a second instruction(s) to the flash memory device that causes the at least partially programmed memory cells become fully erased.

    摘要翻译: 非易失性存储器件包括在擦除非易失性(例如闪存)存储器单元块的操作期间的支持存储器单元恢复。 非易失性存储器系统包括闪存器件和电耦合到闪速存储器件的存储器控​​制器。 存储器控制器被配置为通过向闪存器件发出第一指令来控制闪存器件内的存储器单元恢复操作,该第一指令使存储器块中的擦除存储器单元变成至少部分被编程的存储器单元,然后发出 使闪存器件的至少部分编程的存储器单元完全被擦除的第二指令。

    Nonvolatile Memory Devices Having Built-in Memory Cell Recovery During Block Erase and Methods of Operating Same
    8.
    发明申请
    Nonvolatile Memory Devices Having Built-in Memory Cell Recovery During Block Erase and Methods of Operating Same 有权
    在块擦除期间具有内置存储器单元恢复的非易失性存储器件和操作方法相同

    公开(公告)号:US20100091578A1

    公开(公告)日:2010-04-15

    申请号:US12498508

    申请日:2009-07-07

    IPC分类号: G11C16/04 G11C16/06

    CPC分类号: G11C16/16

    摘要: Nonvolatile memory devices include support memory cell recovery during operations to erase blocks of nonvolatile (e.g., flash) memory cells. A nonvolatile memory system includes a flash memory device and a memory controller electrically coupled to the flash memory device. The memory controller is configured to control memory cell recovery operations within the flash memory device by issuing a first instruction(s) to the flash memory device that causes erased memory cells in the block of memory to become at least partially programmed memory cells and then issuing a second instruction(s) to the flash memory device that causes the at least partially programmed memory cells become fully erased.

    摘要翻译: 非易失性存储器件包括在擦除非易失性(例如闪存)存储器单元块的操作期间的支持存储器单元恢复。 非易失性存储器系统包括闪存器件和电耦合到闪速存储器件的存储器控​​制器。 存储器控制器被配置为通过向闪存器件发出第一指令来控制闪存器件内的存储器单元恢复操作,该第一指令使存储器块中的擦除存储器单元变成至少部分被编程的存储器单元,然后发出 使闪存器件的至少部分编程的存储器单元完全被擦除的第二指令。