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公开(公告)号：US20170149273A1
公开(公告)日：2017-05-25
申请号：US14949100
申请日：2015-11-23
Applicant: Jae Jin LEE , Kyo Beum LEE
Inventor： Jae Jin LEE , Kyo Beum LEE
CPC classification number: H02J9/061 , H02J7/0029 , H02J2007/004 , H05B33/0815 , H05B33/0842 , H05B37/00 , H05B37/0227
Abstract: Disclosed herein is a direct current (DC) uninterruptible power supply system. The DC uninterruptible power supply system is connected to a DC power conversion system converting prevailing alternating current (AC) power into DC power, supplies the DC power to a load, charges an internal auxiliary power supply device with the DC power, and continuously supplies power to the load from the auxiliary power supply device while cutting off an electric connection with the DC power conversion system when the DC power conversion system short-circuits due to a leakage current or damage thereof or is disconnected.
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公开(公告)号：US20130170536A1
公开(公告)日：2013-07-04
申请号：US13407478
申请日：2012-02-28
Applicant: Chun Seok JEONG , Jae Jin LEE , Chang Sik YOO , Jang Woo LEE , Seok Joon KANG
Inventor： Chun Seok JEONG , Jae Jin LEE , Chang Sik YOO , Jang Woo LEE , Seok Joon KANG
IPC: H03H7/40
CPC classification number: H04L25/03878 , H04L25/03012
Abstract: A data equalizing circuit includes an equalizer configured to output data according to a control code; and a detection unit configured to divide the data into N number of calculation periods, count data transition frequencies for the N calculation periods, calculate dispersion values of the data transition frequencies for the N calculation periods, and output the control code corresponding to a largest dispersion value, in response to a counting interruption signal and a counting completion signal, wherein n is equal to or greater than 2, N is greater than n, and the data is divided to n number of unit intervals (UI), andwherein a phase shift of each of the calculation periods with respect to its corresponding UI is different from a phase shift of any of the other calculation periods with respect to its corresponding UI.
Abstract translation: 数据均衡电路包括：均衡器，被配置为根据控制码输出数据; 以及检测单元，被配置为将数据划分为N个计算周期，用于N个计算周期的计数数据转换频率，计算N个计算周期的数据转换频率的色散值，并输出与最大色散对应的控制码 响应于计数中断信号和计数完成信号，其中n等于或大于2，N大于n，并且数据被划分为n个单位间隔（UI），并且其中相位 每个计算周期相对于其对应的UI的移位不同于任何其他计算周期相对于其对应的UI的相移。
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公开(公告)号：US20130107548A1
公开(公告)日：2013-05-02
申请号：US13567776
申请日：2012-08-06
Applicant: Byoung Sung KIM , Sang Eun LIM , Jae Jin LEE , Yeoun Chul SON
Inventor： Byoung Sung KIM , Sang Eun LIM , Jae Jin LEE , Yeoun Chul SON
CPC classification number: H01L33/62 , F21V29/74 , F21V29/75 , F21Y2115/10 , H01L33/486 , H01L33/642 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/49107 , H01L2924/00014
Abstract: Exemplary embodiments of the present invention provide a light emitting diode package including a light emitting diode chip, a lead frame having a chip area on which the light emitting diode chip is arranged, and a package body supporting the lead frame. The lead frame includes a first terminal group arranged at a first side of the chip area and a second terminal group arranged at a second side of the chip area. The first terminal group and the second terminal group each include a first terminal connected to the chip area and a second terminal separated from the chip area, and the width of the first terminal is different than the width of the second terminal outside the package body.
Abstract translation: 本发明的示例性实施例提供一种包括发光二极管芯片的发光二极管封装，其上布置有发光二极管芯片的芯片区域的引线框架和支撑引线框架的封装体。 引线框架包括布置在芯片区域的第一侧的第一端子组和布置在芯片区域的第二侧的第二端子组。 第一端子组和第二端子组各自包括连接到芯片区域的第一端子和与芯片区域分离的第二端子，并且第一端子的宽度不同于封装体外部的第二端子的宽度。
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公开(公告)号：US20130170537A1
公开(公告)日：2013-07-04
申请号：US13407546
申请日：2012-02-28
Applicant: Chun Seok JEONG , Jae Jin LEE , Chang Sik YOO , Jang Woo LEE , Seok Joon KANG
Inventor： Chun Seok JEONG , Jae Jin LEE , Chang Sik YOO , Jang Woo LEE , Seok Joon KANG
IPC: H03H7/40
CPC classification number: H04L25/03038
Abstract: A data equalizing circuit includes an equalizer configured to control a gain of data according to a value of a control code and output a controller gain; and a detection unit configured to divide n cycles of the data into N periods, count data transition frequencies for n/N periods while changing the value of the control code, calculate dispersion values of data transition frequencies for 1/N periods of the data from the data transition frequencies for the n/N periods, and finally output the value of the control code corresponding to a largest dispersion value, wherein n is equal to or greater than 2 and is set such that boundaries of the respective n/N periods of the data have different positions in the 1 UI data.
Abstract translation: 数据均衡电路包括均衡器，其被配置为根据控制码的值控制数据的增益并输出控制器增益; 以及检测单元，被配置为将数据的n个周期分成N个周期，在改变控制码的值的同时，计算n / N个周期的数据转换频率，计算数据的1 / N个周期的数据转换频率的色散值， n / N周期的数据转换频率，最后输出对应于最大色散值的控制码的值，其中n等于或大于2，并且被设置为使得各个n / N周期的边界 数据在1 UI数据中具有不同的位置。
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公开(公告)号：US20100289581A1
公开(公告)日：2010-11-18
申请号：US12494620
申请日：2009-06-30
Applicant: Mi Hye KIM , Jae Jin LEE
Inventor： Mi Hye KIM , Jae Jin LEE
IPC: H03F3/45
CPC classification number: H03F3/45183 , H03F2203/45674
Abstract: A differential amplifying device includes a first differential amplifying unit that receives an input signal and a reference voltage. The first differential amplifying unit amplifies the input signal to generate an output signal when a sensing signal is at a first level. A second differential amplifying unit is configured to also receive the input signal and the reference voltage. The second differential amplifying unit amplifies the input signal to generate the output signal when the sensing signal is at a second level. The first and second differential amplifying units are configured to take advantage of transistor characteristics.
Abstract translation: 差分放大装置包括接收输入信号和参考电压的第一差分放大单元。 当感测信号处于第一电平时，第一差分放大单元放大输入信号以产生输出信号。 第二差分放大单元被配置为还接收输入信号和参考电压。 当感测信号处于第二电平时，第二差分放大单元放大输入信号以产生输出信号。 第一和第二差分放大单元被配置为利用晶体管特性。
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Patent Agency Ranking
6.发明申请公开(公告)号：US20100001808A1
公开(公告)日：2010-01-07
申请号：US12433116
申请日：2009-04-30
Applicant: Jae Jin LEE , Chul Soon Park , Dung Yun Jung , Ki Chan Eun
Inventor： Jae Jin LEE , Chul Soon Park , Dung Yun Jung , Ki Chan Eun
IPC: H01P5/107
CPC classification number: H01P5/107
Abstract: A wireless communication module includes a plurality of monolithic millimeter-wave integrated circuits (MMICs) for signal processing attached to the top surface of a multi-layer low temperature co-fired ceramic substrate; a planar transmission line formed on the top surface of the multi-layer substrate for communications between the MMICs; a metal base attached to the bottom surface of the multi-layer substrate and having an opening to which an antenna is attached; a plurality of vias for connecting the metal base and the planar transmission line within the multi-layer substrate to establish a uniform potential on a ground plane of the multi-layer substrate; an embedded waveguide formed in the opening surrounded with the vias within the multi-layer substrate; and a planar transmission line-to-waveguide transition apparatus for the transition of waves between the planar transmission line and the embedded waveguide.
Abstract translation: 无线通信模块包括多个单层毫米波集成电路（MMIC），用于信号处理，附接到多层低温共烧陶瓷衬底的顶表面; 形成在所述多层基板的上表面上用于MMIC之间的通信的平面传输线; 金属基底，附着在多层基板的底面上，并具有安装有天线的开口; 用于连接多层基板内的金属基底和平面传输线的多个通孔，以在多层基底的接地平面上建立均匀的电位; 在所述开口中形成的嵌入式波导，所述开口被所述多层基板内的通孔包围; 以及用于在平面传输线和嵌入式波导之间转换波的平面传输线到波导转换装置。
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7.发明申请公开(公告)号：US20090185413A1
公开(公告)日：2009-07-23
申请号：US12136878
申请日：2008-06-11
Applicant: Mi Hye KIM , Jae Jin LEE
Inventor： Mi Hye KIM , Jae Jin LEE
CPC classification number: G11C5/147 , G11C5/143 , G11C7/1078 , G11C7/1084 , H03K19/00384 , H03K2005/0013 , H03K2005/00208
Abstract: A semiconductor device minimizes generation of an output signal skew of an input buffer and thus stabilizes the operation of the semiconductor device. The semiconductor integrated circuit includes an input potential detection unit outputting a detection signal in response to a level of an input signal, an input buffer buffering the input signal, and an output path control unit that receives the output signal of the input buffer and the detection signal of the input potential detection unit and outputs an output driving signal in response to the level of the detection signal.
Abstract translation: 半导体器件最小化输入缓冲器的输出信号偏斜的产生，从而稳定半导体器件的操作。 半导体集成电路包括输入电位检测单元，其响应于输入信号的电平，缓冲输入信号的输入缓冲器和接收输入缓冲器的输出信号和检测的输出路径控制单元输出检测信号 信号，并且响应于检测信号的电平而输出输出驱动信号。
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公开(公告)号：US20160094086A1
公开(公告)日：2016-03-31
申请号：US14893374
申请日：2014-11-05
Applicant: Jae Jin LEE
Inventor： Jae Jin LEE , Sung Wan RO , Kyo Beum LEE
IPC: H02J9/06
Abstract: Disclosed is a direct current uninterruptible power supply system. The direct current uninterruptible power supply system according to an embodiment of the present invention is electrically connected to a direct current power converter for converting commercial alternating current power to direct current power, in order to: supply the direct current power to a load and charge an auxiliary power supply device therein with the direct current power. In the case of a short circuit of the direct current power converter due to a current leakage or breakage of the direct current power converter, or if the direct current power converter is disconnected, the direct current uninterruptible power supply system enables the auxiliary power supply device to constantly supply power to the load while completely blocking the electrical connection to the direct current power converter.
Abstract translation: 公开了直流不间断电源系统。 根据本发明的实施例的直流不间断电源系统电连接到直流电力转换器，用于将商用交流电力转换为直流电力，以便：将直流电力提供给负载并充电 其中具有直流电源的辅助电源装置。 在由于直流电力转换器的电流泄漏或断线引起的直流电力转换器的短路的情况下，或直流电力转换器断开的情况下，直流不间断电源系统使辅助供电装置 以不断地向负载供电，同时完全阻断与直流电力转换器的电连接。
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公开(公告)号：US20120273783A1
公开(公告)日：2012-11-01
申请号：US13544548
申请日：2012-07-09
Applicant: Sang Jin BYEON , Jae Jin LEE
Inventor： Sang Jin BYEON , Jae Jin LEE
IPC: H01L25/16
CPC classification number: H03K19/173
Abstract: A semiconductor apparatus has a plurality of chips stacked therein, and generation timing of read control signals for controlling read operations of the plurality of stacked chips is controlled such that times after a read command is applied to when data are outputted from respective chips are made to substantially correspond to one another.
Abstract translation: 半导体装置具有堆叠的多个芯片，并且控制用于控制多个堆叠芯片的读取操作的读取控制信号的生成定时，使得在将读取命令应用于从各个芯片输出数据之后的时间被制成 基本相对应。
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公开(公告)号：US20160006297A1
公开(公告)日：2016-01-07
申请号：US14435532
申请日：2013-10-08
Applicant: Jae Jin LEE
Inventor： Jae Jin LEE , Kyo Beum LEE
CPC classification number: H02J9/061 , H02J7/0068
Abstract: Provided is an uninterruptible direct current (DC) power supply system, which includes a first connection unit electrically connected to a DC power conversion system which converts prevailing AC power into the DC power, a second connection unit which is electrically connected to the load and supplies the DC power to the load, an auxiliary power supply charged by the DC power, and an uninterruptible control unit which supplies the DC power supplied from the DC power conversion system normally connected to the first connection unit to the load through the second connection unit, charges the auxiliary power supply, and controls power to be continuously supplied to the load while perfectly cutting off electrical connection between the DC power conversion system and the auxiliary power supply when the DC power conversion system is disconnected from the first connection unit, is damaged, or short-circuits.
Abstract translation: 提供一种不间断直流（DC）电源系统，其包括电连接到直流电力转换系统的第一连接单元，该直流电力转换系统将主要的交流电力转换为直流电力;第二连接单元，电连接到负载和供应 负载的直流电力，由直流电源充电的辅助电源;以及不间断控制单元，其通过第二连接单元将正常连接到第一连接单元的直流电力转换系统提供的直流电力提供给负载， 对辅助电源进行充电，并且当DC电力转换系统与第一连接单元断开连接时，在完全切断直流电力转换系统与辅助电源之间的电气连接的同时，控制向负载连续供电的电力被损坏， 或短路。
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