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公开(公告)号：US07336672B1
公开(公告)日：2008-02-26
申请号：US10422796
申请日：2003-04-25
IPC分类号： H04L12/28
CPC分类号： H04L47/10 , H04L47/283 , H04L47/30 , H04L47/32
摘要： Various techniques for queue management based on random early detection (RED) are disclosed herein. In particular, a method for generating a drop probability for an incoming packet in a device having a queue to buffer packets between segments of a network is provided. The method comprises determining, upon receipt of an incoming packet, a size of the queue and determining an error based at least in part on a difference between the queue size and a threshold. The method further comprises determining a drop probability for the incoming packet based at least in part on the error and a constant gain factor. The constant gain factor may be based at least in part on a linearized second order dynamic model of the network.
摘要翻译： 本文中公开了基于随机早期检测（RED）的队列管理的各种技术。 特别地，提供了一种用于在具有队列以在网络的段之间缓冲分组的设备中生成用于输入分组的丢弃概率的方法。 该方法包括在接收到传入分组时确定队列的大小并且至少部分地基于队列大小与阈值之间的差异来确定错误。 该方法还包括至少部分地基于误差和恒定增益因子确定输入分组的丢弃概率。 恒定增益因子可以至少部分地基于网络的线性化二阶动态模型。
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公开(公告)号：US06788697B1
公开(公告)日：2004-09-07
申请号：US09635898
申请日：2000-08-11
申请人： James Aweya , Michel Ouellette , Delfin Y. Montuno
发明人： James Aweya , Michel Ouellette , Delfin Y. Montuno
IPC分类号： H04L1226
CPC分类号： H04L49/9036 , H04L49/90 , H04L49/901 , H04L49/9026 , H04L49/9052 , H04L49/9078
摘要： An improved buffer management process is disclosed wherein the buffer is shared among a plurality of packet queues. The improved buffer management process comprises computing a common queue threshold value based upon the aggregate size of the plurality of packet queues and a predetermined buffer threshold value. The common queue threshold value is then used to manage the size of each of the plurality of packet queues and thereby manage the buffer.
摘要翻译： 公开了一种改进的缓冲器管理过程，其中缓冲器在多个分组队列之间共享。 改进的缓冲器管理过程包括基于多个分组队列的聚合大小和预定的缓冲器阈值来计算公共队列阈值。 然后使用公共队列阈值来管理多个分组队列中的每一个的大小，从而管理缓冲器。
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3.发明授权公开(公告)号：US07787370B1
公开(公告)日：2010-08-31
申请号：US09946736
申请日：2001-09-06
申请人： James Aweya , Michel Ouellette , Delfin Y. Montuno , Kent Felske
发明人： James Aweya , Michel Ouellette , Delfin Y. Montuno , Kent Felske
IPC分类号： G01R31/08
CPC分类号： H04L47/10 , H04L45/245 , H04L47/125 , Y02D50/30
摘要： A technique for adaptively load balancing connections in multi-link trunks is disclosed. The present invention provides an adaptive load balancing algorithm that utilizes relative link quality metrics to adjust traffic distribution between links. Link quality metrics may include short-term averages of an observed packet drop rate for each member link in a bundle. The present invention may dynamically adjust the number of flows on each link in proportion to available bandwidth. In addition, link quality metrics may be equalized, such that no link is more lossy than the others.
摘要翻译： 公开了一种用于在多链路干线中自适应地负载平衡连接的技术。 本发明提供一种自适应负载平衡算法，其利用相对链路质量度量来调整链路之间的业务分布。 链路质量度量可以包括捆绑中每个成员链路观察到的分组丢弃率的短期平均值。 本发明可以与可用带宽成比例地动态地调整每个链路上的流量。 此外，链路质量度量可能会相等，使得没有链路比其他链路更有损耗。
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公开(公告)号：US07221656B1
公开(公告)日：2007-05-22
申请号：US10172981
申请日：2002-06-18
申请人： James Aweya , Michel Ouellette , Delfin Y. Montuno
发明人： James Aweya , Michel Ouellette , Delfin Y. Montuno
CPC分类号： H04L47/10 , H04L47/2441 , H04L47/30 , H04L47/326
摘要： A technique for implementing an admission control scheme for data flows is disclosed. In one embodiment, the technique is realized by determining a current error value in response to a queue size in a packet buffer; generating a packet drop probability based at least in part on the current error value; receiving a data packet having a data type; and determining whether to reject or accept the received data packet at a queue based at least in part on the packet drop probability and a predetermined flow rejection threshold. In addition, the technique may involve determining whether a randomly generated number is less than or equal to the packet drop probability and determining whether a count variable is greater than or equal to an inter-drop interval.
摘要翻译： 公开了一种用于实现数据流的准入控制方案的技术。 在一个实施例中，通过响应于分组缓冲器中的队列大小来确定当前错误值来实现该技术; 至少部分地基于当前误差值产生分组丢弃概率; 接收具有数据类型的数据分组; 以及至少部分地基于分组丢弃概率和预定流拒绝阈值来确定是否拒绝或接受队列处的接收数据分组。 此外，该技术可以涉及确定随机生成的数量是否小于或等于分组丢弃概率，并且确定计数变量是否大于或等于中间间隔。
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公开(公告)号：US07130368B1
公开(公告)日：2006-10-31
申请号：US10246399
申请日：2002-09-19
IPC分类号： H03D3/24
CPC分类号： H03L7/085 , H03L7/0992 , H03L7/181 , H04J3/0632 , H04N21/21805 , H04N21/4305 , H04N21/44004
摘要： A system and method for synchronizing a local clock to a reference clock using a linear model of the error between the local clock and the reference clock is disclosed. In one embodiment, a direct smoothing process is used in conjunction with the linear model to estimate a frequency offset by which the frequency of an oscillator of the local clock is adjusted. Also disclosed herein is a phased-lock loop (PLL) adapted to synchronize a local clock with a reference clock using the direct smoothing process, as well as a system implementing the PLL for timing the playout of data received from a transmitter.
摘要翻译： 公开了一种使用本地时钟和参考时钟之间的误差的线性模型将本地时钟同步到参考时钟的系统和方法。 在一个实施例中，直线平滑处理与线性模型一起使用以估计调整本地时钟的振荡器的频率的频率偏移。 本文还公开了适用于使用直接平滑处理将本地时钟与参考时钟同步的相控锁环（PLL），以及实现用于定时从发射机接收的数据的播出的定时的PLL的系统。
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公开(公告)号：US06961307B1
公开(公告)日：2005-11-01
申请号：US09900146
申请日：2001-07-09
申请人： James Aweya , Michel Ouellette , Delfin Y. Montuno
发明人： James Aweya , Michel Ouellette , Delfin Y. Montuno
CPC分类号： H04L47/30 , H04L47/10 , H04L47/263 , H04L47/32
摘要： A technique for managing a queue so as to distribute losses among different service classes is disclosed. In one embodiment, the technique is realized by classifying an incoming packet into one of a plurality of classes. Each class has an associated weighting factor. The system continuously monitors a queue size and determines an overall packet drop probability based on the actual queue size and a target queue size and calculates a target class drop probability based on the overall packet drop probability and the weighting factor. Finally, the system makes a comparison based on the target class drop probability and a selected value and decides whether to drop the incoming packet based on a result of the comparison. If losses are unavoidable in the system, the technique ensures that the losses will be distributed among the different service classes in inverse proportion to the service price of each class.
摘要翻译： 公开了一种用于管理队列以便在不同服务类别之间分配丢失的技术。 在一个实施例中，该技术通过将输入分组分类为多个类中的一个来实现。 每个类都有相关的加权因子。 系统连续监视队列大小，并根据实际队列大小和目标队列大小确定整体分组丢弃概率，并根据整体分组丢弃概率和权重因子计算目标类丢弃概率。 最后，系统根据目标类丢弃概率和选定值进行比较，并根据比较结果决定是否丢弃传入的数据包。 如果系统中的损失是不可避免的，则该技术可以确保不同服务类别之间的损失与每个类的服务价格成反比。
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7.发明授权Differential timing transfer over synchronous ethernet using digital frequency generators and control word signaling 失效使用数字频率发生器和控制字信号的同步以太网的差分定时传输公开(公告)号：US08467418B2
公开(公告)日：2013-06-18
申请号：US12268008
申请日：2008-11-10
申请人： James Aweya , Michel Ouellette , Delfin Y. Montuno
发明人： James Aweya , Michel Ouellette , Delfin Y. Montuno
IPC分类号： H04J3/06
CPC分类号： H04L7/0079 , G06F1/0328 , H03L7/0805 , H03L7/085 , H03L7/089 , H03L2207/50 , H04J3/0632 , H04J3/0658
摘要： A method, system and master service interface transfer differential timing over a packet network. The transmitting service interface receives a service clock and is coupled to a receiving service interface through a network backplane. A primary reference clock is provided to time the network backplane. The primary reference clock and the service clock are used to synthesize a copy of the service clock connected to the transmitting service interface. A first control word containing an error differential between the service clock and the synthesized copy of the service clock is generated and transmitted through the network backplane via a packet. The first control word, together with the primary reference clock, is used to recreate the service clock for timing the receiving service interface.
摘要翻译： 一种方法，系统和主服务接口通过分组网络传输差分定时。 发送业务接口接收业务时钟，通过网络背板耦合到接收业务接口。 提供主参考时钟来对网络背板进行时间。 主参考时钟和服务时钟用于合成连接到发送服务接口的业务时钟的副本。 生成服务时钟和服务时钟的合成副本之间的误差的第一个控制字，并经由分组通过网络背板发送。 第一个控制字与主参考时钟一起用于重新创建用于定时接收服务接口的服务时钟。
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公开(公告)号：US20120182863A1
公开(公告)日：2012-07-19
申请号：US13362319
申请日：2012-01-31
CPC分类号： H04L41/12 , H04J3/0679
摘要： In response to a network topology change, a clock root node calculates a new clock path for each affected node by building a clock source topology tree, and identifying from that tree a path to the network node from a clock source of higher or equal stratum relative to that network node. The root node then sends a network message to each node indicating the new path that the node should use. Each node receives the message and compares the new path with the existing path. If the paths are different then the node acquires the new path just received in the message. If the paths are the same then the node does nothing and discards the message.
摘要翻译： 响应于网络拓扑变化，时钟根节点通过构建时钟源拓扑树来为每个受影响的节点计算新的时钟路径，并且从该树中识别来自较高或相等层次的时钟源的网络节点的路径 到该网络节点。 根节点然后向每个节点发送一个网络消息，指示节点应该使用的新路径。 每个节点接收消息，并将新路径与现有路径进行比较。 如果路径不同，则节点获取刚刚在消息中接收到的新路径。 如果路径相同，则节点不执行任何操作并丢弃该消息。
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9.发明授权Timestamp-based all digital phase locked loop for clock synchronization over packet networks 有权基于时间戳的全数字锁相环，用于通过分组网络进行时钟同步公开(公告)号：US07656985B1
公开(公告)日：2010-02-02
申请号：US11279431
申请日：2006-04-12
申请人： James Aweya , Michel Ouellette , Delfin Y. Montuno , Kent Felske
发明人： James Aweya , Michel Ouellette , Delfin Y. Montuno , Kent Felske
IPC分类号： H03D3/24
CPC分类号： H03L7/093 , H03L7/0992 , H03L7/18 , H04J3/0632 , H04J3/0664
摘要： A timestamp-based all digital phase locked loop is utilized for clock synchronization for Circuit Emulation Service (“CES”) over packet networks. The all digital phase locked loop at a CES receiver includes a phase detector, a loop filter, a digital oscillator and a timestamp counter. The all digital phase locked loop enables the CES receiver to synchronize a local clock at the receiver with a clock at a CES transmitter, where indications of transmitter clock signals are communicated to the receiver as timestamps. The phase detector is operable to compute an error signal indicative of differences between the timestamps and a local clock signal. The loop filter is operable to reduce jitter and noise in the error signal, and thereby produce a control signal. The digital oscillator is operable to oscillate at a frequency based at least in-part on the control signal, and thereby produce a digital oscillator output signal. The timestamp counter operable to count pulses in the digital oscillator output signal, and output the local clock signal.
摘要翻译： 基于时间戳的全数字锁相环用于通过分组网络进行电路仿真服务（“CES”）的时钟同步。 CES接收机的全数字锁相环包括相位检测器，环路滤波器，数字振荡器和时间戳计数器。 全数字锁相环使得CES接收机能够使接收机处的本地时钟与CES发射机的时钟同步，其中发射机时钟信号的指示作为时间戳传送到接收机。 相位检测器可用于计算指示时间戳与本地时钟信号之间的差异的误差信号。 环路滤波器可操作以减少误差信号中的抖动和噪声，从而产生控制信号。 数字振荡器可操作以至少部分地基于控制信号以频率振荡，从而产生数字振荡器输出信号。 时间戳计数器可用于对数字振荡器输出信号中的脉冲进行计数，并输出本地时钟信号。
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公开(公告)号：US07043651B2
公开(公告)日：2006-05-09
申请号：US10076415
申请日：2002-02-19
CPC分类号： H04N21/64322 , H03L7/093 , H03L7/0992 , H03L7/18 , H04J3/0632 , H04J3/0664 , H04N21/242 , H04N21/4305
摘要： A technique for synchronizing clocks in a network is disclosed. In one exemplary embodiment, the technique may be realized as a method for synchronizing clocks in a network. The method comprises receiving a first timestamp and a second timestamp, each indicating a respective time instance as determined by a first clock signal within the network. The method also comprises measuring a first time interval between the first timestamp and the second timestamp. The method further comprises generating a difference signal representing a difference between the first time interval and a second time interval, and generating a second clock signal based upon the difference signal such that the second clock signal is synchronized with the first clock signal.
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