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1.发明授权Method of forming a molded array package device having an exposed tab and structure 有权形成具有暴露突片和结构的模制阵列封装装置的方法公开(公告)号：US07602054B2
公开(公告)日：2009-10-13
申请号：US11243195
申请日：2005-10-05
IPC分类号： H01L23/02
CPC分类号： H01L21/561 , H01L23/49524 , H01L23/49562 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2224/05554 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/49175 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2224/85 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： In one embodiment, a method for forming a molded flat pack style package includes attaching electronic chips to an array lead frame, which includes a plurality of elongated flag portions with tab portions and a plurality of leads. The method further includes connecting the electronic chips to specific leads, and then molding the array lead frame while leaving portions of the leads exposed to form a molded array structure. The molded array structure is then separated to provide molded flat pack style packages having exposed leads for insertion mount and exposed tab portions. In an alternative embodiment, the separation step produces a no-lead configuration with exposed tab portions.
摘要翻译： 在一个实施例中，一种用于形成模制扁平封装型封装的方法包括将电子芯片附接到阵列引线框架，该阵列引线框架包括具有突片部分和多个引线的多个细长标记部分。 该方法还包括将电子芯片连接到特定引线，然后模制阵列引线框架，同时使部分引线暴露以形成模制阵列结构。 然后将模制的阵列结构分离以提供具有用于插入安装和暴露的突片部分的暴露引线的模制扁平封装型封装。 在替代实施例中，分离步骤产生具有暴露的突片部分的无引线配置。
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2.发明授权Method of forming a molded array package device having an exposed tab and structure 有权形成具有暴露突片和结构的模制阵列封装装置的方法公开(公告)号：US07901990B2
公开(公告)日：2011-03-08
申请号：US12553706
申请日：2009-09-03
CPC分类号： H01L21/561 , H01L23/49524 , H01L23/49562 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2224/05554 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/49175 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2224/85 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： In one embodiment, a method for forming a molded flat pack style package includes attaching electronic chips to an array lead frame, which includes a plurality of elongated flag portions with tab portions and a plurality of leads. The method further includes connecting the electronic chips to specific leads, and then molding the array lead frame while leaving portions of the leads exposed to form a molded array structure. The molded array structure is then separated to provide molded flat pack style packages having exposed leads for insertion mount and exposed tab portions. In an alternative embodiment, the separation step produces a no-lead configuration with exposed tab portions.
摘要翻译： 在一个实施例中，一种用于形成模制扁平封装型封装的方法包括将电子芯片附接到阵列引线框架，该阵列引线框架包括具有突片部分和多个引线的多个细长标记部分。 该方法还包括将电子芯片连接到特定引线，然后模制阵列引线框架，同时使部分引线暴露以形成模制阵列结构。 然后将模制的阵列结构分离以提供具有用于插入安装和暴露的突片部分的暴露引线的模制扁平封装型封装。 在替代实施例中，分离步骤产生具有暴露的突片部分的无引线配置。
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3.发明申请METHOD OF FORMING A MOLDED ARRAY PACKAGE DEVICE HAVING AN EXPOSED TAB AND STRUCTURE 有权形成具有暴露的标签和结构的模制的阵列包装设备的方法公开(公告)号：US20100019367A1
公开(公告)日：2010-01-28
申请号：US12553706
申请日：2009-09-03
CPC分类号： H01L21/561 , H01L23/49524 , H01L23/49562 , H01L24/48 , H01L24/49 , H01L24/97 , H01L2224/05554 , H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/49171 , H01L2224/49175 , H01L2224/73265 , H01L2224/97 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/181 , H01L2224/85 , H01L2224/83 , H01L2924/00 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： In one embodiment, a method for forming a molded flat pack style package includes attaching electronic chips to an array lead frame, which includes a plurality of elongated flag portions with tab portions and a plurality of leads. The method further includes connecting the electronic chips to specific leads, and then molding the array lead frame while leaving portions of the leads exposed to form a molded array structure. The molded array structure is then separated to provide molded flat pack style packages having exposed leads for insertion mount and exposed tab portions. In an alternative embodiment, the separation step produces a no-lead configuration with exposed tab portions.
摘要翻译： 在一个实施例中，一种用于形成模制扁平封装型封装的方法包括将电子芯片附接到阵列引线框架，该阵列引线框架包括具有突片部分和多个引线的多个细长标记部分。 该方法还包括将电子芯片连接到特定引线，然后模制阵列引线框架，同时使部分引线暴露以形成模制阵列结构。 然后将模制的阵列结构分离以提供具有用于插入安装和暴露的突片部分的暴露引线的模制扁平封装型封装。 在替代实施例中，分离步骤产生具有暴露的突片部分的无引线配置。
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4.发明授权公开(公告)号：US07755179B2
公开(公告)日：2010-07-13
申请号：US11575864
申请日：2004-12-20
IPC分类号： H01L23/02
CPC分类号： H01L23/4334 , H01L23/49562 , H01L23/49568 , H01L24/37 , H01L24/40 , H01L24/41 , H01L2224/32245 , H01L2224/371 , H01L2224/37147 , H01L2224/3754 , H01L2224/40091 , H01L2224/40245 , H01L2224/83801 , H01L2224/84801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012
摘要： In an exemplary embodiment, a packaged device having enhanced thermal dissipation characteristics includes a semiconductor chip having a major current carrying or heat generating electrode. The semiconductor chip is oriented so that the major current carrying electrode faces the top of the package or away from the next level of assembly. The packaged device further includes a conductive clip for coupling the major current carrying electrode to a next level of assembly, and a heat spreader device formed on or integral with the conductive clip. A portion of the heat spreader device may be optionally exposed.
摘要翻译： 在示例性实施例中，具有增强的散热特性的封装器件包括具有主要载流或发热电极的半导体芯片。 半导体芯片被定向成使得主载流电极面向封装的顶部或远离下一级组件。 封装装置还包括用于将主载流电极耦合到下一级组件的导电夹子，以及形成在导电夹子上或与导电夹子一体形成的散热器装置。 散热器装置的一部分可以任选暴露。
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公开(公告)号：USD489338S1
公开(公告)日：2004-05-04
申请号：US29187122
申请日：2003-07-28
申请人： Michael Seddon , Francis Carney , Kent L. Kime
设计人： Michael Seddon , Francis Carney , Kent L. Kime
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6.发明申请Semiconductor Package Structure Having Enhanced Thermal Dissipation Characteristics 有权具有增强的散热特性的半导体封装结构公开(公告)号：US20080246130A1
公开(公告)日：2008-10-09
申请号：US11575864
申请日：2004-12-20
IPC分类号： H01L23/495 , H01L23/36
CPC分类号： H01L23/4334 , H01L23/49562 , H01L23/49568 , H01L24/37 , H01L24/40 , H01L24/41 , H01L2224/32245 , H01L2224/371 , H01L2224/37147 , H01L2224/3754 , H01L2224/40091 , H01L2224/40245 , H01L2224/83801 , H01L2224/84801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/01057 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/12032 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/00012
摘要： In an exemplary embodiment, a packaged device having enhanced thermal dissipation characteristics includes a semiconductor chip having a major current carrying or heat generating electrode. The semiconductor chip is oriented so that the major current carrying electrode faces the top of the package or away from the next level of assembly. The packaged device further includes a conductive clip for coupling the major current carrying electrode to a next level of assembly, and a heat spreader device formed on or integral with the conductive clip. A portion of the heat spreader device may be optionally exposed.
摘要翻译： 在示例性实施例中，具有增强的散热特性的封装器件包括具有主要载流或发热电极的半导体芯片。 半导体芯片被定向成使得主载流电极面向封装的顶部或远离下一级组件。 封装装置还包括用于将主载流电极耦合到下一级组件的导电夹子，以及形成在导电夹子上或与导电夹子一体形成的散热器装置。 散热器装置的一部分可以任选暴露。
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