公开(公告)号：US20070136529A1

公开(公告)日：2007-06-14

申请号：US11564695

申请日：2006-11-29

申请人： Jan Otterstedt ,  Christian Peters ,  Dirk Rabe ,  Holger Sedlak

发明人： Jan Otterstedt ,  Christian Peters ,  Dirk Rabe ,  Holger Sedlak

IPC分类号： G06F12/00

CPC分类号： G06K19/07381 ,  G06F11/1441 ,  G06F21/55

摘要： A device for non-volatile storage of a status value indicating that there has been a condition, including a non-volatile storage, an energy storage for storing energy when applying a supply voltage, and a switching circuit to couple the energy storage to the non-volatile storage to write the status value thereto if the condition is present.

摘要翻译： 用于非易失性存储状态值的装置，其指示已经存在包括非易失性存储器的状况的值，用于在施加电源电压时存储能量的能量存储器以及用于将能量存储器耦合到非易失性存储器的开关电路 - 如果条件存在，则将其状态值写入其中。

公开(公告)号：US07660169B2

公开(公告)日：2010-02-09

申请号：US11564695

申请日：2006-11-29

申请人： Jan Otterstedt ,  Christian Peters ,  Dirk Rabe ,  Holger Sedlak

发明人： Jan Otterstedt ,  Christian Peters ,  Dirk Rabe ,  Holger Sedlak

IPC分类号： G11C7/00

CPC分类号： G06K19/07381 ,  G06F11/1441 ,  G06F21/55

摘要： A device for non-volatile storage of a status value indicating that there has been a condition, including a non-volatile storage, an energy storage for storing energy when applying a supply voltage, and a switching circuit to couple the energy storage to the non-volatile storage to write the status value thereto if the condition is present.

摘要翻译： 用于非易失性存储状态值的装置，其指示已经存在包括非易失性存储器的状况的值，用于在施加电源电压时存储能量的能量存储器以及用于将能量存储器耦合到非易失性存储器的开关电路 - 如果条件存在，则将其状态值写入其中。

公开(公告)号：US20050154868A1

公开(公告)日：2005-07-14

申请号：US11017209

申请日：2004-12-20

申请人： Dirk Rabe ,  Holger Sedlak

发明人： Dirk Rabe ,  Holger Sedlak

IPC分类号： G06F9/30 ,  G06F9/32 ,  G06F9/42 ,  G06F9/44 ,  G06F9/45

CPC分类号： G06F9/30054 ,  G06F9/4486

摘要： An apparatus for processing a sequence of instructions, which comprises a LCALL instruction, a FCALL instruction and a common re-jump instruction (return), comprises a means for reading-in an instruction, to perform the read-in instruction of a means for examining the instruction. In the case of the presence of LCALL or FCALL, a stack memory is filled, while the stack is emptied in the case of the presence of a re-jump instruction. At every re-jump, a predetermined amount of re-jump information is taken from stack and supplied to a means for decoding, which is formed to access the stack again in the case where the predetermined amount of re-jump information indicates a change of the physical memory window, to finally supply the correct address for the next instruction in the instruction sequence to the means for reading in. Thereby, the same re-jump instruction can be used for a call with FCALL (outside of a current physical memory window) and a call with LCALL (within the physical memory window), without a microprocessor change, by encoding the re-jump information on the stack and by decoding them by the means for decoding. Thereby, the re-jump instruction provided for the microprocessor can be used for both jump instructions.

摘要翻译： 一种用于处理包括LCALL指令，FCALL指令和公共重新跳转指令（返回））指令序列的装置，包括用于读取指令的装置，以执行用于 检查说明。 在存在LCALL或FCALL的情况下，填充堆栈内存，而在存在重新跳转指令的情况下堆栈被清空。 在每次重新跳跃时，从堆栈取出预定量的重跳信息，并提供给解码装置，该装置形成为在预定量的重跳信息指示改变的情况下再次访问堆栈 物理存储器窗口，最终为指令序列中的下一个指令提供正确的地址以供读取装置。因此，可以使用与FCALL（当前物理存储器窗口外部）的调用相同的重新跳转指令 ）和具有LCALL（在物理存储器窗口内）的呼叫，而不需要微处理器改变，通过对堆栈上的重新跳转信息进行编码，并通过解码装置进行解码。 因此，为微处理器提供的重新跳转指令可以用于两个跳转指令。

公开(公告)号：US07415602B2

公开(公告)日：2008-08-19

申请号：US11017209

申请日：2004-12-20

申请人： Dirk Rabe ,  Holger Sedlak

发明人： Dirk Rabe ,  Holger Sedlak

IPC分类号： G06F9/42 ,  G06F9/44 ,  G06F12/10

CPC分类号： G06F9/30054 ,  G06F9/4486

摘要： An apparatus for processing a sequence of instructions, which comprises a LCALL instruction, a FCALL instruction and a common re-jump instruction (return), comprises a means for reading-in an instruction, to perform the read-in instruction of a means for examining the instruction. In the case of the presence of LCALL or FCALL, a stack memory is filled, while the stack is emptied in the case of the presence of a re-jump instruction. At every re-jump, a predetermined amount of re-jump information is taken from stack and supplied to a means for decoding, which is formed to access the stack again in the case where the predetermined amount of re-jump information indicates a change of the physical memory window, to finally supply the correct address for the next instruction in the instruction sequence to the means for reading in. Thereby, the same re-jump instruction can be used for a call with FCALL (outside of a current physical memory window) and a call with LCALL (within the physical memory window), without a microprocessor change, by encoding the re-jump information on the stack and by decoding them by the means for decoding. Thereby, the re-jump instruction provided for the microprocessor can be used for both jump instructions.

摘要翻译： 一种用于处理包括LCALL指令，FCALL指令和公共重新跳转指令（返回））指令序列的装置，包括用于读取指令的装置，以执行用于 检查说明。 在存在LCALL或FCALL的情况下，填充堆栈内存，而在存在重新跳转指令的情况下堆栈被清空。 在每次重新跳跃时，从堆栈取出预定量的重跳信息，并提供给解码装置，该装置形成为在预定量的重跳信息指示改变的情况下再次访问堆栈 物理存储器窗口，最终为指令序列中的下一个指令提供正确的地址以供读取装置。因此，可以使用与FCALL（当前物理存储器窗口外部）的调用相同的重新跳转指令 ）和具有LCALL（在物理存储器窗口内）的呼叫，而不需要微处理器改变，通过对堆栈上的重新跳转信息进行编码，并通过解码装置进行解码。 因此，为微处理器提供的重新跳转指令可以用于两个跳转指令。

公开(公告)号：US07529999B2

公开(公告)日：2009-05-05

申请号：US11530262

申请日：2006-09-08

申请人： Marcus Janke ,  Dirk Rabe ,  Steffen M. Sonnekalb

发明人： Marcus Janke ,  Dirk Rabe ,  Steffen M. Sonnekalb

IPC分类号： G01R31/28

CPC分类号： H01L23/576 ,  G06F11/27 ,  G06F21/87 ,  G11C7/24 ,  G11C29/12 ,  G11C29/38 ,  G11C2029/0401 ,  G11C2029/0409 ,  H01L2924/0002 ,  H01L2924/00

摘要： An integrated circuit arrangement including at least one circuit part which is designed to run through a functional self test and to output test results of the functional self test, and a testing unit, which is coupled to an input and an output and which is coupled to the at least one circuit part via testing lines. The testing unit is designed to start the functional self test when a starting signal for the functional self test is applied to the input, to evaluate test results that are present to determine whether they have a predefined relationship with predefined values, and to output data indicating the test result at the output. The testing unit is also designed to start the functional self test by internal circuit means and to evaluate the test results present.

摘要翻译： 一种集成电路装置，包括至少一个电路部分，其被设计成运行在功能自检中并输出功能自检的测试结果;以及测试单元，其耦合到输入和输出，并耦合到 所述至少一个电路部分经由测试线。 测试单元被设计为当功能自检的起始信号被应用于输入时开始功能自检，以评估存在的测试结果以确定它们是否具有与预定义值的预定义关系，并且输出指示 输出的测试结果。 测试单元还设计用于通过内部电路手段启动功能自检，并评估当前的测试结果。

公开(公告)号：US20070257646A1

公开(公告)日：2007-11-08

申请号：US11743915

申请日：2007-05-03

申请人： Thomas Leutgeb ,  Gerhard Nebel ,  Dirk Rabe ,  Dietmar Scheiblhofer ,  Bernd Zimek

发明人： Thomas Leutgeb ,  Gerhard Nebel ,  Dirk Rabe ,  Dietmar Scheiblhofer ,  Bernd Zimek

IPC分类号： G05F1/573 ,  G05F3/16

CPC分类号： G05F1/573

摘要： A current-supply circuit includes a regulation transistor. The regulation transistor is formed to regulate, based on a first supply voltage present on a first supply-voltage feed line, a second supply voltage present on a second supply-voltage feed line. The regulation transistor provides a supply current to the second supply-voltage feed line. The voltage-supply circuit further includes an operating-point determiner, which is formed to determine, based on information that is a measure for the supply current, whether the regulation transistor is at a low operating point at which the supply current is below a determined current. The voltage-supply circuit further includes a preventer that is formed to prevent, starting from the low operating point, a rise of the supply current by at least a predetermined current amount from occurring within a predetermined period.

摘要翻译： 电流源电路包括调节晶体管。 调节晶体管形成为基于存在于第一电源电压馈电线上的第一电源电压来调节存在于第二电源电压馈电线上的第二电源电压。 调节晶体管向第二电源电压馈电线提供电源电流。 电压电路还包括工作点确定器，其被形成为基于作为供电电流的测量的信息来确定调节晶体管是否处于供电电流低于确定的低工作点 当前。 电压电路还包括防止器，其形成为防止从低工作点开始供电电流的上升至少预定电流量，从而在预定时间段内发生。

公开(公告)号：US07062632B2

公开(公告)日：2006-06-13

申请号：US10760108

申请日：2004-01-16

申请人： Juergen Freiwald ,  Dirk Rabe

发明人： Juergen Freiwald ,  Dirk Rabe

IPC分类号： G06F12/00

CPC分类号： G06F9/342 ,  G06F9/3879

摘要： The present invention is based on the finding that free CPU operation code identifiers of a CPU or CPU operation code identifiers useable for any reason can be used to control supporting means upstream of the CPU, which is able to form, responsive to these operation code identifiers, a new, for example, physical address in relation to a second memory area having a second memory which is larger than the, for example, logic memory size addressable by the CPU. By means of the special operation code identifiers, it is thus possible in the course of an executable machine code to address the supporting means which monitors the data traffic via which the operation codes to be processed or the operation code identifiers are provided to the CPU, from the memory to the CPU, and which can take measures in relation to the new formed address when certain special operation code identifiers occur. In this way, on the one hand, a complicated redesign of the CPU and, on the other hand, the necessity of a software-resetting of the current memory window complicated as regards both the executable machine code and the processing speed are avoided.

摘要翻译： 本发明是基于以下发现：CPU或CPU的CPU操作代码标识符可由任何原因使用的可用CPU操作代码标识符可用于控制CPU上游的支持装置，其能够响应于这些操作代码标识符而形成 ，例如关于具有大于可由CPU寻址的例如逻辑存储器大小的第二存储器的第二存储器区域的新的例如物理地址。 通过特殊的操作代码标识符，在可执行的机器代码的过程中可以寻址监视要处理的操作代码或操作代码标识符被提供给CPU的数据业务的支持装置， 从存储器到CPU，并且当某些特殊操作代码标识符发生时，它们可以采取与新形成的地址相关的措施。 以这种方式，一方面，CPU的复杂重新设计，另一方面，避免了对可执行机器码和处理速度都复杂的当前存储器窗口的软件重置的必要性。

公开(公告)号：US20090172489A1

公开(公告)日：2009-07-02

申请号：US12268226

申请日：2008-11-10

申请人： Markus Janke ,  Franz Klug ,  Peter Laackmann ,  Dirk Rabe ,  Stefan Rueping

发明人： Markus Janke ,  Franz Klug ,  Peter Laackmann ,  Dirk Rabe ,  Stefan Rueping

IPC分类号： G01R31/3177 ,  G06F11/25

CPC分类号： G01R31/3177

摘要： A circuit arrangement comprising a logic circuit to be tested and a test circuit is provided. The logic circuit is designed to provide output data from input data, said output data being generated from the input data by logic-circuit-internal combinations, such that the output data are in a predetermined relationship with the input data. The logic circuit is designed to detect whether the relationship is fulfilled and to provide an error signal if the relationship is not fulfilled. The test circuit is designed to alter logic-circuit-internal combinations. The test circuit is designed to detect the error signal, and is furthermore designed to output an alarm signal if the error signal is not detected upon alteration of the logic-circuit-internal combinations.

摘要翻译： 提供了包括要测试的逻辑电路和测试电路的电路装置。 逻辑电路被设计成从输入数据提供输出数据，所述输出数据通过逻辑电路内部组合从输入数据产生，使得输出数据与输入数据处于预定关系。 逻辑电路被设计为检测是否满足关系，并且如果不满足关系，则提供错误信号。 测试电路设计用于改变逻辑电路内部组合。 测试电路设计用于检测误差信号，并且还被设计为如果在逻辑电路内部组合的改变时未检测到误差信号则输出报警信号。

公开(公告)号：US07996742B2

公开(公告)日：2011-08-09

申请号：US12268226

申请日：2008-11-10

申请人： Marcus Janke ,  Franz Klug ,  Peter Laackmann ,  Dirk Rabe ,  Stefan Rueping

发明人： Marcus Janke ,  Franz Klug ,  Peter Laackmann ,  Dirk Rabe ,  Stefan Rueping

IPC分类号： G06F11/00

CPC分类号： G01R31/3177

摘要： A circuit arrangement comprising a logic circuit to be tested and a test circuit. The logic circuit comprising logic-circuit-internal combinations configured to generate output data from input data based on a predetermined relationship. The logic circuit is configured to detect whether the relationship is satisfied and to provide an error signal if the relationship is not satisfied. The test circuit is configured to alter logic-circuit-internal combinations, to detect the error signal, and to output an alarm signal if the error signal is not detected upon alteration of the logic-circuit-internal combinations.

摘要翻译： 一种包括要测试的逻辑电路和测试电路的电路装置。 所述逻辑电路包括逻辑电路内部组合，其被配置为基于预定关系从输入数据生成输出数据。 所述逻辑电路被配置为检测所述关系是否被满足，并且如果所述关系不满足则提供误差信号。 测试电路被配置为改变逻辑电路内部组合以检测误差信号，并且如果在逻辑电路内部组合改变时未检测到误差信号则输出报警信号。

公开(公告)号：US07605575B2

公开(公告)日：2009-10-20

申请号：US11743915

申请日：2007-05-03

申请人： Thomas Leutgeb ,  Gerhard Nebel ,  Dirk Rabe ,  Dietmar Scheiblhofer ,  Bernd Zimek

发明人： Thomas Leutgeb ,  Gerhard Nebel ,  Dirk Rabe ,  Dietmar Scheiblhofer ,  Bernd Zimek

IPC分类号： G05F1/40 ,  G05F1/56

CPC分类号： G05F1/573

摘要： A current-supply circuit includes a regulation transistor. The regulation transistor is formed to regulate, based on a first supply voltage present on a first supply-voltage feed line, a second supply voltage present on a second supply-voltage feed line. The regulation transistor provides a supply current to the second supply-voltage feed line. The voltage-supply circuit further includes an operating-point determiner, which is formed to determine, based on information that is a measure for the supply current, whether the regulation transistor is at a low operating point at which the supply current is below a determined current. The voltage-supply circuit further includes a preventer that is formed to prevent, starting from the low operating point, a rise of the supply current by at least a predetermined current amount from occurring within a predetermined period.

摘要翻译： 电流源电路包括调节晶体管。 调节晶体管形成为基于存在于第一电源电压馈电线上的第一电源电压来调节存在于第二电源电压馈电线上的第二电源电压。 调节晶体管向第二电源电压馈电线提供电源电流。 电压电路还包括工作点确定器，其被形成为基于作为供应电流的测量的信息来确定调节晶体管是否处于供电电流低于确定的低工作点 当前。 电压电路还包括防止器，其形成为防止从低工作点开始供电电流的上升至少预定电流量，从而在预定时间段内发生。