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公开(公告)号：US4607139A
公开(公告)日：1986-08-19
申请号：US618010
申请日：1984-06-06
摘要： A monolithic module acting as the interface between a modem and leased ("LL") or switched ("SL") telephone lines, mainly characterized in that: 1. It can be formed on a silicon chip (due to the absence of electromechanical relays or similar switching means), and 2. Its architecture is such that it makes it possible, by interconnecting or "stacking" identical modules, not only to attach additional telephone lines, but also to increase the number of allowable modem configurations. The module (10, 10') comprises two controlled-type line amplifiers (DLL, DSL) which exhibit a high output impedance regardless of whether the power supplies are "on" or "off"; two controlled-type line receivers (RSL, RLL) which provide a very high input impedance whether the power supplies are "on" or "off"; and a wrap receiver (WRP) for testing the modem (to the exclusion of the telephone lines) and interconnecting or "stacking" identical modules. The figure shows an embodiment wherein two of the modules are interconnected; various configurations can be obtained depending on the logic state of the control inputs (1 to 4 for module 10 and 1' to 4' for module 10') supplied by the modem.
摘要翻译： 作为调制解调器和租用（“LL”）或交换（“SL”）电话线路之间的接口的单片模块，其主要特征在于：1.它可以形成在硅芯片上（由于没有机电继电器 或类似的切换装置）和2.其架构使得它可以通过互连或“堆叠”相同的模块，不仅可以附加附加的电话线，而且可以增加允许的调制解调器配置的数量。 模块（10,10'）包括两个受控类型的线路放大器（DLL，DSL），其表现出高的输出阻抗，而不管电源是“开”还是“关”。 两个控制型线路接收器（RSL，RLL），无论电源是“开”还是“关”，都提供非常高的输入阻抗; 以及用于测试调制解调器（排除电话线）和互连或“堆叠”相同模块的包裹接收器（WRP）。 该图示出了其中两个模块互连的实施例; 取决于调制解调器提供的控制输入（模块10的1到4和模块10'的1'到4'）的逻辑状态可以获得各种配置。
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2.发明授权
公开(公告)号：US4516247A
公开(公告)日：1985-05-07
申请号：US496328
申请日：1983-05-19
CPC分类号： H04L25/24 , H03K19/01806
摘要： A circuit for receiving signals from a device connected through a line meeting the requirements of EIA RS232C Standard, comprising a differential amplifier (2) receiving an input signal the amplitude of which is divided by factor k through input network (1). The switching threshold of amplifier (2) is variable and has a first value to ensure switching on the positive slope edge of the input signal and a second value to ensure switching on the negative slope edge. This circuit comprises circuits for detecting the status of the connected device, including a level detector (3) and a decision circuit (4) which, according to the outputs of the receiver and level detector (5), generates a signal indicating the status of the connected device. Integrators (5, 6) are provided for preventing the status indicating signal from changing its level when the input signal goes through zero or receives short noise pulses.
摘要翻译： 用于从通过符合EIA RS232C标准要求的线路连接的设备接收信号的电路，包括差分放大器（2），差分放大器（2）通过输入网络（1）接收其幅度除以因子k的输入信号。 放大器（2）的切换阈值是可变的，并且具有第一值以确保接通输入信号的正斜率边缘，并且具有第二值以确保接通负斜率边缘。 该电路包括用于检测连接装置的状态的电路，包括电平检测器（3）和判定电路（4），该电路根据接收器和电平检测器（5）的输出产生指示状态的信号 连接的设备。 提供积分器（5,6），用于当输入信号通过零或接收短噪声脉冲时，防止状态指示信号改变其电平。
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公开(公告)号：US5028925A
公开(公告)日：1991-07-02
申请号：US410166
申请日：1989-09-20
IPC分类号： H03M3/02
摘要： A sigma-delta converter including a switching component controlled by a first clock having determined transitions for generating a train of sigma-delta code pulses corresponding to an analog input value. The sigma-delta includes circuits for generating a second clock of a same frequency as the first clock and having a negative transition followed after a defined period of time (d2) by a positive transition. The determined transitions of the first clock controlling the switching element occur during said defined period of time. There is also included a circuit controlled by the sigma-delta code pulse train and said second clock for generating a train of sigma-delta pulses insensitive to the mismatch of the rise and fall times of the switching element thereby improving the linearity and the signal-to-noise ratio of the converter. The control of the period of time allows varying of the energy of the pulses in order to provide pulse trains which, when applied to a sigma-delta decoder, provide an analog output value representative of, but attenuated with respect to, the analog input value.
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4.发明授权Monolithic autobiased resistor structure and application thereof to interface circuits 失效单片自偏置电阻器结构及其应用于接口电路
公开(公告)号：US4578695A
公开(公告)日：1986-03-25
申请号：US554025
申请日：1983-11-21
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8222 , H01L27/02 , H01L27/06 , H01L29/8605 , H03K19/0175 , H02H9/04 , H03K3/01 , H03K5/153
CPC分类号： H03K19/017509 , H01L27/0229 , H01L29/8605
摘要： A monolithically integrated resistive attenuator is autobiased from an input bipolar signal the amplitude of which is higher than the integrated circuit voltage supplies. The resistive attenuator is arranged in a first pocket formed in an epitaxial layer, and is connected between the input bipolar signal and ground. An intermediate tap produces an output signal. A diode and capacitor are formed in a second pocket. The diode is connected between the input bipolar signals and the epitaxial layer while the capacitor is connected between the epitaxial layer and the isolation walls thereof. The positive half-periods of the input bipolar signal charges the capacitor, which in turn biases the epitaxial layers. The attenuator, therefore, can be monolithically integrated into a silicon chip and remain isolated for all values of the input bipolar signal. The output signal produced by the attenuator is less than the integrated circuit voltage supplies so that the circuits driven by the output signal can be integrated without difficulties.
摘要翻译： 单片集成电阻衰减器从输入双极性信号自动偏置，其幅度高于集成电路电压源。 电阻衰减器布置在形成于外延层中的第一凹坑中，并连接在输入双极性信号和地之间。 中间抽头产生输出信号。 二极管和电容器形成在第二口袋中。 二极管连接在输入双极性信号和外延层之间，而电容器连接在外延层及其隔离壁之间。 输入双极性信号的正半周期对电容器充电，电容器进一步偏置外延层。 因此，衰减器可以单片集成到硅芯片中，并且对于输入双极性信号的所有值保持隔离。 由衰减器产生的输出信号小于集成电路电压供应，使得由输出信号驱动的电路可以毫无困难地集成。
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5.发明授权Interface circuit in conformity with EIA standards and implemented with an operational amplifier-like circuit 失效接口电路符合EIA标准，并采用运算放大器状电路实现
公开(公告)号：US4340922A
公开(公告)日：1982-07-20
申请号：US208959
申请日：1980-11-21
IPC分类号： H03K5/02 , H03K17/082 , H03K19/018 , H02H9/04
CPC分类号： H03K19/01831 , H03K17/0826 , H03K5/02
摘要： An interface circuit for exchanging digital signals between two pieces of data processing equipment is provided in integrated form in accordance with international standards, such as EIA Standards. This is achieved through modification of an operational amplifier to adapt its use to the conditions and requirements of interface circuits.
摘要翻译： 根据国际标准，如EIA标准，以两种数据处理设备之间交换数字信号的接口电路集成形式提供。 这是通过修改运算放大器来实现的，以使其适用于接口电路的条件和要求。
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