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    Method of making a power switching trench MOSFET having aligned source regions
    4.
    发明授权
    Method of making a power switching trench MOSFET having aligned source regions 失效
    制造具有对准的源极区的功率开关沟槽MOSFET的方法

    公开(公告)号：US5897343A

    公开(公告)日：1999-04-27

    申请号：US50164

    申请日：1998-03-30

    申请人： Leo Mathew ,  Keith G. Kamekona ,  Huy Trong Tran ,  Prasad Venkatraman ,  Jeffrey Pearse ,  Bich-Yen Nguyen

    发明人： Leo Mathew ,  Keith G. Kamekona ,  Huy Trong Tran ,  Prasad Venkatraman ,  Jeffrey Pearse ,  Bich-Yen Nguyen

    IPC分类号： H01L21/336 ,  H01L29/06 ,  H01L29/78 ,  H01L21/332

    CPC分类号： H01L29/7813 ,  H01L29/0696

    摘要： A trench power switching transistor (10) is fabricated having sub-micron features on a body layer (26) without using sub-micron lithography. An opening in a field oxide layer (28) defines an area for implanting a source region (30) in the body layer (26) that is self-aligned to a first edge (28A) and a second edge (28B) of the field oxide layer (28). Sidewall spacers (32) are formed in accordance with the first and second edges (28A and 28B) of the field oxide layer (28). A trench is aligned to the sidewall spacers (32) and formed centered within the source region (30). An implant layer (42) formed between sections of the power switching transistor (10) is aligned to the sidewall spacers (32) at the first and second edges (28A and 28B).

    摘要翻译： 在不使用亚微米光刻的情况下，在主体层（26）上制造具有亚微米特征的沟槽功率开关晶体管（10）。 场氧化物层（28）中的开口限定用于将源区域（30）注入到主体层（26）中的区域，所述源区域（30）自对准到场的第一边缘（28A）和第二边缘（28B） 氧化物层（28）。 侧壁间隔件（32）根据场氧化物层（28）的第一和第二边缘（28A和28B）形成。 沟槽与侧壁间隔件（32）对准，并形成在源区域（30）的中心。 形成在功率开关晶体管（10）的部分之间的注入层（42）在第一和第二边缘（28A和28B）处与侧壁间隔件（32）对准。

    Electronic device comprising conductive structures and an insulating layer between the conductive structures and within a trench
    8.
    发明授权
    Electronic device comprising conductive structures and an insulating layer between the conductive structures and within a trench 有权
    电子器件包括导电结构和在导电结构之间和沟槽内的绝缘层

    公开(公告)号：US08647970B2

    公开(公告)日：2014-02-11

    申请号：US13327390

    申请日：2011-12-15

    申请人： Gary H. Loechelt ,  Prasad Venkatraman

    发明人： Gary H. Loechelt ,  Prasad Venkatraman

    IPC分类号： H01L21/425

    CPC分类号： H01L29/41741 ,  H01L29/1095 ,  H01L29/402 ,  H01L29/4175 ,  H01L29/41766 ,  H01L29/42376 ,  H01L29/456 ,  H01L29/4933 ,  H01L29/66659 ,  H01L29/66689 ,  H01L29/66696 ,  H01L29/7816 ,  H01L29/7827 ,  H01L29/7835

    摘要： An electronic device can include a substrate including an underlying doped region and a semiconductor layer overlying the substrate. A trench can have a sidewall and extend at least partly through the semiconductor layer. The electronic device can further include a first conductive structure adjacent to the underlying doped region, an insulating layer, and a second conductive structure within the trench. The insulating layer can be disposed between the first and second conductive structures, and the first conductive structure can be disposed between the insulating layer and the underlying doped region. Processes of forming the electronic device may be performed such that the first conductive structure includes a conductive fill material or a doped region within the semiconductor layer. The first conductive structure can allow the underlying doped region to be farther from the channel region and allow RDSON to be lower for a given BVDSS.

    摘要翻译： 电子器件可以包括包括下面的掺杂区域和覆盖衬底的半导体层的衬底。 沟槽可以具有侧壁并且至少部分地延伸穿过半导体层。 电子器件还可以包括邻近下面的掺杂区域的第一导电结构，绝缘层和沟槽内的第二导电结构。 绝缘层可以设置在第一和第二导电结构之间，并且第一导电结构可以设置在绝缘层和下面的掺杂区域之间。 可以执行形成电子器件的工艺，使得第一导电结构包括导电填充材料或半导体层内的掺杂区域。 第一导电结构可以允许下面的掺杂区域离沟道区域更远，并允许给定BVDSS的RDSON较低。

    PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A TRENCH AND A CONDUCTIVE STRUCTURE THEREIN
    9.
    发明申请
    PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A TRENCH AND A CONDUCTIVE STRUCTURE THEREIN 有权
    形成电子装置的方法，包括TRENCH和导电结构

    公开(公告)号：US20130221428A1

    公开(公告)日：2013-08-29

    申请号：US13404855

    申请日：2012-02-24

    申请人： Prasad Venkatraman ,  Balaji Padmanabhan

    发明人： Prasad Venkatraman ,  Balaji Padmanabhan

    IPC分类号： H01L29/78 ,  H01L21/28 ,  H01L21/336

    CPC分类号： H01L29/7827 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66727 ,  H01L29/66734 ,  H01L29/7811 ,  H01L29/7813

    摘要： An electronic device can include a transistor structure, including a patterned semiconductor layer overlying a substrate and having a primary surface, wherein the patterned semiconductor layer defines a first trench and a second trench that extend from the primary surface towards the substrate. The electronic device can further include a first conductive electrode and a gate electrode within the first trench. The electronic device can still further include a second conductive electrode within the second trench. The electronic device can include a source region within the patterned semiconductor layer and disposed between the first and second trenches. The electronic device can further include a body contact region within the patterned semiconductor layer and between the first and second trenches, wherein the body contact region is spaced apart from the primary surface. Processes of forming the electronic device can take advantage of forming all trenches during processing sequence.

    摘要翻译： 电子器件可以包括晶体管结构，其包括覆盖在衬底上并具有主表面的图案化半导体层，其中图案化的半导体层限定从主表面朝向衬底延伸的第一沟槽和第二沟槽。 电子器件还可以包括在第一沟槽内的第一导电电极和栅电极。 电子器件还可以在第二沟槽内进一步包括第二导电电极。 电子器件可以包括图案化半导体层内的源极区域，并且设置在第一和第二沟槽之间。 电子器件还可以包括在图案化的半导体层内以及在第一和第二沟槽之间的体接触区域，其中主体接触区域与主表面间隔开。 形成电子器件的过程可以利用在处理序列期间形成所有沟槽的优点。

    ELECTRONIC DEVICE COMPRISING A CONDUCTIVE STRUCTURE AND AN INSULATING LAYER WITHIN A TRENCH AND A PROCESS OF FORMING THE SAME
    10.
    发明申请
    ELECTRONIC DEVICE COMPRISING A CONDUCTIVE STRUCTURE AND AN INSULATING LAYER WITHIN A TRENCH AND A PROCESS OF FORMING THE SAME 有权
    包含导电结构的导体结构的电子器件和在其中的绝缘层及其形成方法

    公开(公告)号：US20130153987A1

    公开(公告)日：2013-06-20

    申请号：US13327361

    申请日：2011-12-15

    申请人： Prasad Venkatraman ,  Gordon M. Grivna ,  Gary H. Loechelt

    发明人： Prasad Venkatraman ,  Gordon M. Grivna ,  Gary H. Loechelt

    IPC分类号： H01L29/78 ,  H01L21/336

    CPC分类号： H01L29/7827 ,  H01L21/2815 ,  H01L29/0634 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/42376 ,  H01L29/66659 ,  H01L29/66689 ,  H01L29/66696 ,  H01L29/7816 ,  H01L29/7835

    摘要： An electronic device can include a semiconductor layer overlying a substrate and having a primary surface and a thickness, wherein a trench extends through at least approximately 50% of the thickness of semiconductor layer to a depth. The electronic device can further include a conductive structure within the trench, wherein the conductive structure extends at least approximately 50% of the depth of the trench. The electronic device can still further include a vertically-oriented doped region within the semiconductor layer adjacent to and electrically insulated from the conductive structure; and an insulating layer disposed between the vertically-oriented doped region and the conductive structure. A process of forming an electronic device can include patterning a semiconductor layer to define a trench extending through at least approximately 50% of the thickness of the semiconductor layer and forming a vertically-oriented doped region after patterning the semiconductor layer to define the trench.

    摘要翻译： 电子器件可以包括覆盖衬底并具有主表面和厚度的半导体层，其中沟槽延伸穿过半导体层厚度的至少大约50％的深度。 电子器件还可以包括在沟槽内的导电结构，其中导电结构延伸至沟槽深度的至少约50％。 电子器件还可以进一步包括在半导体层内的垂直取向的掺杂区域，该掺杂区域与导电结构相邻并与导电结构电绝缘; 以及设置在垂直取向的掺杂区域和导电结构之间的绝缘层。 形成电子器件的过程可以包括图案化半导体层以限定延伸穿过至少大约50％的半导体层的厚度的沟槽，并且在图案化半导体层以形成沟槽之后形成垂直取向的掺杂区域。