METHOD AND CONTROLLER FOR POWER MANAGEMENT
    1.
    发明申请
    METHOD AND CONTROLLER FOR POWER MANAGEMENT 有权
    电源管理方法与控制器

    公开(公告)号:US20100064158A1

    公开(公告)日:2010-03-11

    申请号:US12358412

    申请日:2009-01-23

    申请人: Jiin Lai Chung-Che Wu

    发明人: Jiin Lai Chung-Che Wu

    IPC分类号: G06F1/32

    摘要: Resuming from a sleep state. A request may received to resume operation of a computer system from a sleep state to an executing state. A restoring process may be initiated to restore the computer system to an executing state. The restoring process may include loading information from a nonvolatile memory medium to a computer system memory medium. A request may be received from a processor of the computer system to access the computer system memory medium. The request may require access to a portion of the computer system memory medium in the executing state, and may be received prior to completion of the restoring process. It may be determined if the portion of the computer system memory medium has been restored. If the portion of the computer system memory medium has not been restored, the portion of the computer system memory medium may be restored from the nonvolatile memory medium ahead of other portions in the restoring process.

    摘要翻译: 从睡眠状态恢复。 可以接收请求以恢复计算机系统从睡眠状态到执行状态的操作。 可以启动恢复过程以将计算机系统恢复到执行状态。 恢复过程可以包括将信息从非易失性存储介质加载到计算机系统存储介质。 可以从计算机系统的处理器接收请求以访问计算机系统存储介质。 该请求可能需要访问处于执行状态的计算机系统存储介质的一部分,并且可以在恢复处理完成之前被接收。 可以确定计算机系统存储介质的部分是否已被恢复。 如果计算机系统存储介质的部分尚未被恢复,那么计算机系统存储介质的该部分可以在恢复过程中的其它部分之前从非易失性存储介质中恢复。

    Method and controller for power management
    2.
    发明授权
    Method and controller for power management 有权
    电源管理方法和控制器

    公开(公告)号:US08499174B2

    公开(公告)日:2013-07-30

    申请号:US12358412

    申请日:2009-01-23

    申请人: Jiin Lai Chung-Che Wu

    发明人: Jiin Lai Chung-Che Wu

    IPC分类号: G06F1/00

    摘要: Resuming from a sleep state. A request may received to resume operation of a computer system from a sleep state to an executing state. A restoring process may be initiated to restore the computer system to an executing state. The restoring process may include loading information from a nonvolatile memory medium to a computer system memory medium. A request may be received from a processor of the computer system to access the computer system memory medium. The request may require access to a portion of the computer system memory medium in the executing state, and may be received prior to completion of the restoring process. It may be determined if the portion of the computer system memory medium has been restored. If the portion of the computer system memory medium has not been restored, the portion of the computer system memory medium may be restored from the nonvolatile memory medium ahead of other portions in the restoring process.

    摘要翻译: 从睡眠状态恢复。 可以接收请求以恢复计算机系统从睡眠状态到执行状态的操作。 可以启动恢复过程以将计算机系统恢复到执行状态。 恢复过程可以包括将信息从非易失性存储介质加载到计算机系统存储介质。 可以从计算机系统的处理器接收请求以访问计算机系统存储介质。 该请求可能需要访问处于执行状态的计算机系统存储介质的一部分,并且可以在恢复处理完成之前被接收。 可以确定计算机系统存储介质的部分是否已被恢复。 如果计算机系统存储介质的部分尚未被恢复,那么计算机系统存储介质的该部分可以在恢复过程中的其它部分之前从非易失性存储介质中恢复。

    Method and controller for power management
    3.
    发明授权
    Method and controller for power management 有权
    电源管理方法和控制器

    公开(公告)号:US08504850B2

    公开(公告)日:2013-08-06

    申请号:US12358441

    申请日:2009-01-23

    申请人: Chung-Che Wu Jiin Lai

    发明人: Chung-Che Wu Jiin Lai

    IPC分类号: G06F1/00

    摘要: Power management of a system. A request may be received to enter a first sleep state for a system. One or more processes may be performed to enter the first sleep state in response to the request to enter the first sleep state. A system memory of the system may be stored in a nonvolatile memory (NVM) in response to the request to enter the first sleep state in order to enter a second sleep state. Power may be removed from the system memory after storing the system memory in the NVM in response to the request to enter the first sleep state. After removing power to the system memory, the system may be in the second sleep state.

    摘要翻译: 一个系统的电源管理 可以接收请求以进入系统的第一睡眠状态。 响应于进入第一睡眠状态的请求,可以执行一个或多个进程以进入第一睡眠状态。 响应于进入第一睡眠状态的请求以进入第二睡眠状态,系统的系统存储器可被存储在非易失性存储器(NVM)中。 在将系统存储器存储在NVM中以响应于进入第一睡眠状态的请求时,可以将系统存储器中的电源移除。 在取消系统内存的电源后,系统可能处于第二个睡眠状态。

    Motherboard and control method thereof
    4.
    发明申请
    Motherboard and control method thereof 有权
    主板及其控制方法

    公开(公告)号:US20060212638A1

    公开(公告)日:2006-09-21

    申请号:US11263970

    申请日:2005-11-02

    IPC分类号: G06F13/36

    CPC分类号: G06F9/4411

    摘要: A motherboard includes a south-bridge chipset, a north-bridge chipset and a central processor unit (CPU). The south-bridge chipset generates at least control-setting data. The north-bridge chipset has a reset register for controlling the north-bridge chipset to generate a reset signal and a control-set resister for storing the control-setting data generated by the south-bridge chipset. The CPU has a plurality of configuration parameters. The configuration parameters of the CPU are reset in accordance with the reset signal, and the control-setting data is written into the CPU by the north-bridge chipset to set one of the configuration parameters of the CPU.

    摘要翻译: 主板包括南桥芯片组,北桥芯片组和中央处理器单元(CPU)。 南桥芯片组至少产生控制设置数据。 北桥芯片组具有用于控制北桥芯片组以产生复位信号的复位寄存器和用于存储由南桥芯片组产生的控制设置数据的控制集合寄存器。 CPU具有多个配置参数。 CPU的配置参数根据复位信号复位,控制设置数据由北桥芯片组写入CPU,以设置CPU的一个配置参数。

    Motherboard and control method thereof
    5.
    发明授权
    Motherboard and control method thereof 有权
    主板及其控制方法

    公开(公告)号:US07325085B2

    公开(公告)日:2008-01-29

    申请号:US11263970

    申请日:2005-11-02

    IPC分类号: G06F13/36

    CPC分类号: G06F9/4411

    摘要: A motherboard includes a south-bridge chipset, a north-bridge chipset and a central processor unit (CPU). The south-bridge chipset generates at least control-setting data. The north-bridge chipset has a reset register for controlling the north-bridge chipset to generate a reset signal and a control-set resister for storing the control-setting data generated by the south-bridge chipset. The CPU has a plurality of configuration parameters. The configuration parameters of the CPU are reset in accordance with the reset signal, and the control-setting data is written into the CPU by the north-bridge chipset to set one of the configuration parameters of the CPU.

    摘要翻译: 主板包括南桥芯片组,北桥芯片组和中央处理器单元(CPU)。 南桥芯片组至少产生控制设置数据。 北桥芯片组具有用于控制北桥芯片组以产生复位信号的复位寄存器和用于存储由南桥芯片组产生的控制设置数据的控制集合寄存器。 CPU具有多个配置参数。 CPU的配置参数根据复位信号复位,控制设置数据由北桥芯片组写入CPU,以设置CPU的一个配置参数。

    Method and motherboard for automatically determining memory type
    6.
    发明授权
    Method and motherboard for automatically determining memory type 有权
    方法和主板用于自动确定内存类型

    公开(公告)号:US06904506B2

    公开(公告)日:2005-06-07

    申请号:US09874163

    申请日:2001-06-05

    IPC分类号: G06F13/16 G06F13/00

    CPC分类号: G06F13/1694 Y02D10/14

    摘要: A method and a motherboard for automatically determining the memory type. By applying the characteristics of different operational voltages for various dynamic random access memory modules, a software program is used to drive a control signal and to automatically adjust the control voltage of the dynamic random access memory. An automatic detection of the types of the dynamic random access memory is obtained. The objectives of protecting the dynamic random access memory and to allow the dynamic random access memory to operate normally can thus be achieved. The invention not only provides the detection mechanism for accessing the dynamic random access memory during the initial activation of the computer system, but also determines the voltages required by the memory module for the computer system to enter various power saving modes.

    摘要翻译: 一种用于自动确定存储器类型的方法和主板。 通过对各种动态随机存取存储器模块应用不同工作电压的特性,使用软件程序驱动控制信号并自动调整动态随机存取存储器的控制电压。 获得动态随机存取存储器的类型的自动检测。 因此可以实现保护动态随机存取存储器和允许动态随机存取存储器正常工作的目的。 本发明不仅提供了在计算机系统的初始激活期间访问动态随机存取存储器的检测机制,而且还确定存储器模块为计算机系统输入各种省电模式所需的电压。

    METHODS AND SYSTEMS FOR CENTRALIZED LINK POWER MANAGEMENT CONTROL (CLMC)
    7.
    发明申请
    METHODS AND SYSTEMS FOR CENTRALIZED LINK POWER MANAGEMENT CONTROL (CLMC) 有权
    用于集中式连接电源管理控制(CLMC)的方法和系统

    公开(公告)号:US20080279104A1

    公开(公告)日:2008-11-13

    申请号:US11836833

    申请日:2007-08-10

    IPC分类号: H04L12/26

    摘要: A method for centralized link power management control (CLMC), performed by a north-bridge of a processing unit, comprises the following steps. A data transmission status of a bus is monitored. CLMC is activated to configure devices corresponding to the bus in order to speed up data transmission of the bus when detecting that the data transmission status of the bus is continually busy. CLMC is activated to configure devices corresponding to the bus in order to slow down data transmission of the bus when detecting that the data transmission status of the bus is continually idle.

    摘要翻译: 由处理单元的北桥执行的集中式链路功率管理控制(CLMC)的方法包括以下步骤。 监视总线的数据传输状态。 激活CLMC以配置对应于总线的设备,以便在检测到总线的数据传输状态持续繁忙时加速总线的数据传输。 当检测到总线的数据传输状态持续空闲时,CLMC被激活以配置对应于总线的设备,以便减慢总线的数据传输。

    Methods for memory initialization
    8.
    发明申请
    Methods for memory initialization 有权
    内存初始化方法

    公开(公告)号:US20060053273A1

    公开(公告)日:2006-03-09

    申请号:US11001148

    申请日:2004-11-30

    IPC分类号: G06F9/00

    CPC分类号: G06F9/4403

    摘要: A memory initialization method for a plurality of memories. The memories are initialized according to predetermined initial parameters. A first quantity of the memories is detected. Optimum parameters are set according hardware information of the memories. The memories are re-initialized according to the optimum parameters. A second quantity of the memories is detected. The parameters for memory initialization are adjusted when the first quantity and the second quantity are different.

    摘要翻译: 一种用于多个存储器的存储器初始化方法。 存储器根据预定的初始参数被初始化。 检测第一数量的存储器。 根据存储器的硬件​​信息设置最佳参数。 根据最佳参数重新初始化存储器。 检测到第二数量的存储器。 当第一数量和第二数量不同时,调整存储器初始化的参数。

    Sole
    9.
    外观设计
    Sole 失效
    唯一

    公开(公告)号:USD487956S1

    公开(公告)日:2004-04-06

    申请号:US29162228

    申请日:2002-06-11

    申请人: Chung-Che Wu

    设计人: Chung-Che Wu

    Methods and systems for centralized link power management control (CLMC)
    10.
    发明授权
    Methods and systems for centralized link power management control (CLMC) 有权
    集中式连接电源管理控制(CLMC)的方法和系统

    公开(公告)号:US07782783B2

    公开(公告)日:2010-08-24

    申请号:US11836833

    申请日:2007-08-10

    IPC分类号: H04J1/16

    摘要: A method for centralized link power management control (CLMC), performed by a north-bridge of a processing unit, comprises the following steps. A data transmission status of a bus is monitored. CLMC is activated to configure devices corresponding to the bus in order to speed up data transmission of the bus when detecting that the data transmission status of the bus is continually busy. CLMC is activated to configure devices corresponding to the bus in order to slow down data transmission of the bus when detecting that the data transmission status of the bus is continually idle.

    摘要翻译: 由处理单元的北桥执行的集中式链路功率管理控制(CLMC)的方法包括以下步骤。 监视总线的数据传输状态。 激活CLMC以配置对应于总线的设备,以便在检测到总线的数据传输状态持续繁忙时加速总线的数据传输。 当检测到总线的数据传输状态持续空闲时,CLMC被激活以配置对应于总线的设备,以便减慢总线的数据传输。