公开(公告)号：US08499174B2

公开(公告)日：2013-07-30

申请号：US12358412

申请日：2009-01-23

申请人： Jiin Lai ,  Chung-Che Wu

发明人： Jiin Lai ,  Chung-Che Wu

IPC分类号： G06F1/00

CPC分类号： G06F1/3203 ,  G06F1/3275 ,  Y02D10/13 ,  Y02D10/14

摘要： Resuming from a sleep state. A request may received to resume operation of a computer system from a sleep state to an executing state. A restoring process may be initiated to restore the computer system to an executing state. The restoring process may include loading information from a nonvolatile memory medium to a computer system memory medium. A request may be received from a processor of the computer system to access the computer system memory medium. The request may require access to a portion of the computer system memory medium in the executing state, and may be received prior to completion of the restoring process. It may be determined if the portion of the computer system memory medium has been restored. If the portion of the computer system memory medium has not been restored, the portion of the computer system memory medium may be restored from the nonvolatile memory medium ahead of other portions in the restoring process.

摘要翻译： 从睡眠状态恢复。 可以接收请求以恢复计算机系统从睡眠状态到执行状态的操作。 可以启动恢复过程以将计算机系统恢复到执行状态。 恢复过程可以包括将信息从非易失性存储介质加载到计算机系统存储介质。 可以从计算机系统的处理器接收请求以访问计算机系统存储介质。 该请求可能需要访问处于执行状态的计算机系统存储介质的一部分，并且可以在恢复处理完成之前被接收。 可以确定计算机系统存储介质的部分是否已被恢复。 如果计算机系统存储介质的部分尚未被恢复，那么计算机系统存储介质的该部分可以在恢复过程中的其它部分之前从非易失性存储介质中恢复。

公开(公告)号：US08504850B2

公开(公告)日：2013-08-06

申请号：US12358441

申请日：2009-01-23

申请人： Chung-Che Wu ,  Jiin Lai

发明人： Chung-Che Wu ,  Jiin Lai

IPC分类号： G06F1/00

CPC分类号： G06F1/3203 ,  G06F1/3275 ,  Y02D10/13 ,  Y02D10/14

摘要： Power management of a system. A request may be received to enter a first sleep state for a system. One or more processes may be performed to enter the first sleep state in response to the request to enter the first sleep state. A system memory of the system may be stored in a nonvolatile memory (NVM) in response to the request to enter the first sleep state in order to enter a second sleep state. Power may be removed from the system memory after storing the system memory in the NVM in response to the request to enter the first sleep state. After removing power to the system memory, the system may be in the second sleep state.

摘要翻译： 一个系统的电源管理 可以接收请求以进入系统的第一睡眠状态。 响应于进入第一睡眠状态的请求，可以执行一个或多个进程以进入第一睡眠状态。 响应于进入第一睡眠状态的请求以进入第二睡眠状态，系统的系统存储器可被存储在非易失性存储器（NVM）中。 在将系统存储器存储在NVM中以响应于进入第一睡眠状态的请求时，可以将系统存储器中的电源移除。 在取消系统内存的电源后，系统可能处于第二个睡眠状态。

公开(公告)号：US20100064158A1

公开(公告)日：2010-03-11

申请号：US12358412

申请日：2009-01-23

申请人： Jiin Lai ,  Chung-Che Wu

发明人： Jiin Lai ,  Chung-Che Wu

IPC分类号： G06F1/32

CPC分类号： G06F1/3203 ,  G06F1/3275 ,  Y02D10/13 ,  Y02D10/14

摘要： Resuming from a sleep state. A request may received to resume operation of a computer system from a sleep state to an executing state. A restoring process may be initiated to restore the computer system to an executing state. The restoring process may include loading information from a nonvolatile memory medium to a computer system memory medium. A request may be received from a processor of the computer system to access the computer system memory medium. The request may require access to a portion of the computer system memory medium in the executing state, and may be received prior to completion of the restoring process. It may be determined if the portion of the computer system memory medium has been restored. If the portion of the computer system memory medium has not been restored, the portion of the computer system memory medium may be restored from the nonvolatile memory medium ahead of other portions in the restoring process.

摘要翻译： 从睡眠状态恢复。 可以接收请求以恢复计算机系统从睡眠状态到执行状态的操作。 可以启动恢复过程以将计算机系统恢复到执行状态。 恢复过程可以包括将信息从非易失性存储介质加载到计算机系统存储介质。 可以从计算机系统的处理器接收请求以访问计算机系统存储介质。 该请求可能需要访问处于执行状态的计算机系统存储介质的一部分，并且可以在恢复处理完成之前被接收。 可以确定计算机系统存储介质的部分是否已被恢复。 如果计算机系统存储介质的部分尚未被恢复，那么计算机系统存储介质的该部分可以在恢复过程中的其它部分之前从非易失性存储介质中恢复。

公开(公告)号：US08781332B2

公开(公告)日：2014-07-15

申请号：US13018548

申请日：2011-02-01

申请人： Jin-Kuan Tang ,  Jiin Lai

发明人： Jin-Kuan Tang ,  Jiin Lai

IPC分类号： H04B10/00

CPC分类号： H04B10/40

摘要： An optical transceiver module adapted to a link device includes a connection unit, a driving unit and optical transmitting and receiving units. The connection unit, to be coupled with the link device, includes an indicating element for generating an indicating signal when the connection unit is coupled with the link device. The driving unit, coupled with the connection unit, receives the indicating signal and outputs a control signal according to the indicating signal. The optical transmitting unit, coupled with the driving unit, receives the control signal for driving the optical transmitting unit to output a first optical signal. The optical receiving unit, coupled with the driving unit, transmits a received second optical signal to the driving unit. An optical transmission device using the optical transceiver module, and an optical transmission method are also disclosed. A link training sequence can be initiated after the connection unit is actually coupled with the link device. Thus, a host cannot enter a disable mode due to error connection.

摘要翻译： 适于链接装置的光收发模块包括连接单元，驱动单元和光发射和接收单元。 要与链接装置耦合的连接单元包括用于当连接单元与链接装置耦合时产生指示信号的指示元件。 与连接单元耦合的驱动单元接收指示信号，并根据指示信号输出控制信号。 与驱动单元耦合的光发送单元接收用于驱动光发送单元的控制信号以输出第一光信号。 光接收单元与驱动单元耦合，将接收到的第二光信号发送到驱动单元。 还公开了使用光收发模块的光传输装置和光传输方法。 链路训练序列可以在连接单元实际上与链路设备耦合之后启动。 因此，由于错误连接，主机无法进入禁用模式。

公开(公告)号：US08549184B2

公开(公告)日：2013-10-01

申请号：US12959299

申请日：2010-12-02

申请人： Jinkuan Tang ,  Jiin Lai ,  Buheng Xu ,  Hui Jiang

发明人： Jinkuan Tang ,  Jiin Lai ,  Buheng Xu ,  Hui Jiang

IPC分类号： G06F3/00 ,  G06F13/12

CPC分类号： G06F13/385

摘要： The present invention is directed to a universal serial bus (USB) transaction translator and an associated IN/OUT bulk transaction method. A device interface is coupled to a device via a device bus, and a host interface is coupled to a host via a host bus, wherein the host USB version is higher than the device USB version. At least two buffers configured to store data are disposed between the device interface and the host interface. A controller stores the data in the buffers alternately. In a bulk-IN transaction, before the host sends an IN packet, the controller pre-fetches data and stores the data in the buffers until all the buffers are full or a requested data length has been achieved; the pre-fetched data are then sent to the host after the host sends the IN packet. In a bulk-OUT transaction, the controller stores the data sent from the host in the buffers, and the data are then post-written to the device.

摘要翻译： 本发明涉及通用串行总线（USB）事务转换器和相关的IN / OUT批量交易方法。 设备接口经由设备总线耦合到设备，并且主机接口通过主机总线耦合到主机，其中主机USB版本高于设备USB版本。 配置为存储数据的至少两个缓冲器被布置在设备接口和主机接口之间。 控制器交替地将数据存储在缓冲器中。 在批量IN事务中，在主机发送IN数据包之前，控制器预取数据并将数据存储在缓冲器中，直到所有缓冲器已满或已达到所请求的数据长度为止; 在主机发送IN数据包之后，将预取的数据发送到主机。 在bulk-OUT事务中，控制器将从主机发送的数据存储在缓冲区中，然后将数据写入设备。

公开(公告)号：US20110246681A1

公开(公告)日：2011-10-06

申请号：US12818342

申请日：2010-06-18

申请人： Jiin Lai

发明人： Jiin Lai

IPC分类号： G06F3/00 ,  G06F13/12

CPC分类号： G06F13/4081 ,  G06F2213/0042

摘要： An apparatus configured to couple to a universal serial bus (USB) 3.0 connector. The apparatus includes a management controller configured to couple to the USB 3.0 connector. The management controller is configured to detect from behavior on the D+ and D− pins of the USB 3.0 connector whether a device plugged into the USB 3.0 connector is a conventional USB 3.0 device or an optical USB device.

摘要翻译： 一种被配置为耦合到通用串行总线（USB）3.0连接器的装置。 该装置包括配置成耦合到USB 3.0连接器的管理控制器。 管理控制器配置为检测USB 3.0连接器的D +和D-引脚上的行为，连接USB 3.0连接器的设备是传统的USB 3.0设备还是光学USB设备。

公开(公告)号：US20110219272A1

公开(公告)日：2011-09-08

申请号：US12862134

申请日：2010-08-24

申请人： Jiin Lai ,  Buheng Xu ,  Jinkuan Tang

发明人： Jiin Lai ,  Buheng Xu ,  Jinkuan Tang

IPC分类号： G06F11/08 ,  G06F13/00 ,  G06F13/12

CPC分类号： G06F13/385 ,  G06F11/08 ,  G06F13/00 ,  G06F13/12

摘要： A data transmission system is provided. The data transmission system includes a first control circuit coupled to a first device, a translation circuit coupled to the first control circuit and a second control circuit coupled to the translation circuit. The first control circuit decodes a first format data packet sent by the first device. The translation circuit receives the decoded first format data packet and translates the decoded first format data packet into a second format data packet. The second control circuit transmits the second format data packet to a host. A data transmission rate of the first device is slower than that of a second device, and the data transmission system is backward compatible to the first device.

摘要翻译： 提供数据传输系统。 数据传输系统包括耦合到第一设备的第一控制电路，耦合到第一控制电路的平移电路和耦合到转换电路的第二控制电路。 第一控制电路解码由第一设备发送的第一格式数据分组。 翻译电路接收解码的第一格式数据分组，并将解码的第一格式数据分组转换为第二格式数据分组。 第二控制电路将第二格式数据包发送到主机。 第一设备的数据传输速率比第二设备的数据传输速率慢，并且数据传输系统向后兼容于第一设备。

公开(公告)号：US07805567B2

公开(公告)日：2010-09-28

申请号：US11854576

申请日：2007-09-13

申请人： Chun-Yuan Su ,  Chau-Chad Tsai ,  Jiin Lai

发明人： Chun-Yuan Su ,  Chau-Chad Tsai ,  Jiin Lai

IPC分类号： G06F12/00

CPC分类号： G06F13/4027 ,  G06F11/1076 ,  G06F2211/1054

摘要： A Northbridge providing RAID access is coupled among a central processing unit, a system memory, and a Southbridge. Furthermore, the Northbridge further couples to a RAID through a Southbridge. The Northbridge include a RAID accelerator for performing RAID operations according to RAID control commands which are stored in a register.

摘要翻译： 在中央处理单元，系统存储器和南桥之间耦合提供RAID访问的北桥。 此外，北桥通过南桥进一步融合到RAID。 北桥包含RAID加速器，用于根据存储在寄存器中的RAID控制命令进行RAID操作。

公开(公告)号：US07271578B2

公开(公告)日：2007-09-18

申请号：US11131401

申请日：2005-05-18

申请人： Hung Yi Kuo ,  Jenny Chen ,  Jiin Lai

发明人： Hung Yi Kuo ,  Jenny Chen ,  Jiin Lai

IPC分类号： G01R17/06

CPC分类号： G01R19/16552

摘要： A voltage monitoring circuit is capable of being integrated into a chip and monitoring the voltage quality. It mainly uses a first waveshaper to receive a voltage signal of a voltage source to be measured, process it to a logic signal, and output to a first logic level transformer. A first digital signal is transformed by the processing and can be recorded by a register such that a managing system can read content of the register through a bus to further determine whether the voltage source has a situation of voltage surge. Similarly, an inverter can be concatenated between a second waveshaper and a second logic level transformer to monitor whether the voltage source has undercurrent pulse. This way, an object of monitoring voltage quality in the chip with a combination of simple analog circuit can be achieved.

摘要翻译： 电压监测电路能够集成到芯片中并监测电压质量。 它主要使用第一个波形器接收要测量的电压源的电压信号，将其处理为逻辑信号，并输出到第一逻辑电平变压器。 第一数字信号通过处理变换，并且可以由寄存器记录，使得管理系统可以通过总线读取寄存器的内容，以进一步确定电压源是否具有电压浪涌的情况。 类似地，逆变器可以连接在第二波形与第二逻辑电平变换器之间，以监测电压源是否具有欠电流脉冲。 这样，可以实现利用简单模拟电路的组合来监视芯片中的电压质量的目的。

公开(公告)号：US07231309B2

公开(公告)日：2007-06-12

申请号：US10904047

申请日：2004-10-21

申请人： Biyun Yeh ,  Victor Wu ,  Jiin Lai

发明人： Biyun Yeh ,  Victor Wu ,  Jiin Lai

IPC分类号： G06F19/00

CPC分类号： G01R31/31725 ,  G01R31/31727

摘要： A method and an apparatus for testing a bridge circuit. The method includes inputting a first test clock to a first conversion unit for triggering the first conversion unit to transfer a test data to a second conversion unit according to rising edges of the first test clock, inputting a second test clock to the second conversion unit for triggering the second conversion unit to output an output data according to falling edges of the second test clock, and controlling the first test clock and the second test clock so that the rising edges of the second test clock are not synchronized to the rising edges of the first test clock. A frequency of the first test clock is an even multiple of a frequency of the second test clock.

摘要翻译： 一种测试桥接电​​路的方法和装置。 该方法包括将第一测试时钟输入到第一转换单元，用于触发第一转换单元根据第一测试时钟的上升沿将测试数据传送到第二转换单元，向第二转换单元输入第二测试时钟 触发所述第二转换单元根据所述第二测试时钟的下降沿输出输出数据，并且控制所述第一测试时钟和所述第二测试时钟，使得所述第二测试时钟的上升沿不与所述第二测试时钟的上升沿同步 第一个测试时钟。 第一测试时钟的频率是第二测试时钟的频率的偶数倍。