公开(公告)号：US09575726B2

公开(公告)日：2017-02-21

申请号：US13814234

申请日：2010-08-03

申请人： Jochen Rivoir

发明人： Jochen Rivoir

IPC分类号： G06F7/58 ,  H03K3/64 ,  H03K3/84

CPC分类号： G06F7/58 ,  G06F7/584 ,  G06F2207/582 ,  H03K3/64 ,  H03K3/84

摘要： A bit sequence generator for generating a bit sequence defined by a generating function and an initial state of the generating function comprising a plurality of state machines and a multiplexer. Each state machine of the plurality of state machines generates a time-interleaved bit sequence, wherein a state machine generates a bit of the time-interleaved bit sequence for a current time step based on at least one bit generated by the state machine for a preceding time step, the generating function of the bit sequence to be generated, and the initial state of the generating function and independent from a time-interleaved bit sequence generated by another state machine of the plurality of state machines. Further, a multiplexer selects successively one bit from each generated time-interleaved bit sequence in a repetitive manner to obtain the bit sequence defined by the generating function and the initial state of the generating function.

摘要翻译： 一种用于生成由生成函数定义的比特序列和包括多个状态机和多路复用器的生成函数的初始状态的比特序列生成器。 多个状态机的每个状态机产生时间交织的比特序列，其中状态机基于状态机为前一个生成的至少一个比特生成当前时间步长的时间交织比特序列的比特 时间步长，要生成的比特序列的生成函数，以及生成函数的初始状态，并且与多个状态机的另一状态机生成的时间交织的比特序列无关。 此外，复用器以重复的方式从每个生成的时间交织比特序列连续地选择一个比特，以获得由生成函数定义的比特序列和生成函数的初始状态。

公开(公告)号：US20150039927A1

公开(公告)日：2015-02-05

申请号：US14517996

申请日：2014-10-20

申请人： Jochen Rivoir

发明人： Jochen Rivoir

IPC分类号： G01R31/317

CPC分类号： G01R31/31725 ,  G01R31/31726 ,  G01R31/3193 ,  G01R31/31937 ,  H04L25/0262 ,  H04L43/50 ,  H04L63/0428

摘要： A data processing unit has a time information provider for processing a clock or a strobe signal, configured to provide a digitized clock or strobe time information on the basis of the clock or strobe signal and at least one data extraction unit, coupled to the time information provider and configured to select data from a sequence of data samples of a data signal depending on the digitized clock or strobe time information.

摘要翻译： 数据处理单元具有用于处理时钟或选通信号的时间信息提供器，其被配置为基于时钟或选通信号提供数字化时钟或选通时间信息，以及耦合到时间信息的至少一个数据提取单元 提供商并且被配置为根据数字化时钟或选通时间信息从数据信号的数据样本序列中选择数据。

公开(公告)号：US20110231464A1

公开(公告)日：2011-09-22

申请号：US13120914

申请日：2008-09-24

申请人： Jochen Rivoir

发明人： Jochen Rivoir

IPC分类号： G06F7/58

CPC分类号： H03K3/84 ,  G06F7/584 ,  G06F2207/581 ,  G06F2207/582

摘要： An embodiment of a state machine for generating a pseudo-random word stream, each word of the word stream including a plurality of subsequent bits of a pseudo-random bit sequence includes a plurality of clock registers and a feedback circuit coupled to the registers and adapted to provide a plurality of feedback signals to the registers based on a feedback function and a plurality of register output signals of the registers, wherein the state machine is configured such that a first word defined by the plurality of register output signals includes a first set of subsequent bits of a pseudo-random bit stream and such that a subsequent second word defined by the plurality of register output signals includes a second set of subsequent bits of a pseudo-random bit stream.

摘要翻译： 一种用于产生伪随机字流的状态机的实施例，包括伪随机位序列的多个后续位的字流的每个字包括多个时钟寄存器和耦合到寄存器并被适配的反馈电路 基于所述寄存器的反馈功能和多个寄存器输出信号向所述寄存器提供多个反馈信号，其中所述状态机被配置为使得由所述多个寄存器输出信号定义的第一字包括第一组 伪随机比特流的后续比特，并且使得由多个寄存器输出信号定义的后续第二字包括伪随机比特流的第二组后续比特。

公开(公告)号：US20110032829A1

公开(公告)日：2011-02-10

申请号：US12671674

申请日：2008-12-17

申请人： Jochen Rivoir

发明人： Jochen Rivoir

IPC分类号： H04L12/26

CPC分类号： G01R31/2846 ,  G01R31/2834 ,  G01R31/2851 ,  G01R31/316

摘要： A method for determining relevance values representing a relevance of a combination of an input node of a first number of input nodes with a measurement node of a second number of measurement nodes for a detection of a fault on a chip applies a third number of tests at the first number of input nodes, measures for each test of the third plurality of tests a signal at each of the second number of measurement nodes to obtain for each measurement node of the second number of measurement nodes a third number of measurement values, and determines the relevance values, wherein each relevance value is calculated based on a correlation between the third number of test input choices defined for the input node of the respective combination and the third number of measurement values associated to the measurement node of the respective combination.

摘要翻译： 用于确定表示第一数量的输入节点的输入节点与第二数量的测量节点的测量节点的组合的相关性的相关性值的方法，用于检测芯片上的故障，将第三数量的测试应用于 所述第一数量的输入节点，对于所述第三多个测试中的每个测试的测量，测量所述第二数量的测量节点中的每一个的信号，以针对所述第二测量节点的每个测量节点获得第三数量的测量值，并且确定 相关值，其中基于针对相应组合的输入节点定义的第三测试输入选择与与相应组合的测量节点相关联的第三测量值之间的相关性计算每个相关性值。

公开(公告)号：US07248660B2

公开(公告)日：2007-07-24

申请号：US10642781

申请日：2003-08-18

申请人： Jochen Rivoir

发明人： Jochen Rivoir

IPC分类号： H04L7/00

CPC分类号： G01R31/31937 ,  H04L7/0334 ,  H04L7/0337

摘要： A method for tracking transitions in a bit stream of a signal includes taking a first sample of said bit stream at a first sampling point of a first sampling sequence, taking a second sample of said bit stream at a second sampling point of said first sampling sequence, and taking a third sample of said bit stream at a third sampling point of said first sampling sequence, wherein said second sampling point is adjusted so that within a first time period, defined by said first and said second sampling points, the number of transitions in said bit stream is equal to the number of transitions within a second time period, defined by said second and said third sampling points.

摘要翻译： 用于跟踪信号比特流中的转换的方法包括在第一采样序列的第一采样点处获取所述位流的第一采样，在所述第一采样序列的第二采样点处采集所述位流的第二采样 并且在所述第一采样序列的第三采样点处获取所述比特流的第三采样，其中调整所述第二采样点，使得在由所述第一和所述第二采样点限定的第一时间段内，转换次数 在所述位流中等于由所述第二和所述第三采样点限定的第二时间段内的转换次数。

公开(公告)号：US20070126414A1

公开(公告)日：2007-06-07

申请号：US11643371

申请日：2006-12-21

申请人： Jochen Rivoir

发明人： Jochen Rivoir

IPC分类号： G01R31/28

CPC分类号： G01R31/31709 ,  G01R31/319 ,  G01R31/31922 ,  H03L7/1974 ,  H03L7/1976

摘要： The present invention relates to a method for generating jitter in a digital data signal, the digital data signal having a predetermined data pattern being stored in a memory, the method comprising the steps of reading out the digital data signal from the memory using a clock signal provided by a clock source and modulating the clock signal provided by the clock source according to clock-control data, wherein the clock-control data represents the jitter to be generated in the digital data signal read out from the memory.

摘要翻译： 本发明涉及一种用于在数字数据信号中产生抖动的方法，该数字数据信号具有存储在存储器中的预定数据模式，该方法包括以下步骤：使用时钟信号从存储器读出数字数据信号 由时钟源提供并根据时钟控制数据调制由时钟源提供的时钟信号，其中时钟控制数据表示在从存储器读出的数字数据信号中产生的抖动。

公开(公告)号：US20060028364A1

公开(公告)日：2006-02-09

申请号：US11197252

申请日：2005-08-04

申请人： Jochen Rivoir

发明人： Jochen Rivoir

IPC分类号： H03M3/00

CPC分类号： H03M7/3013 ,  H03M3/344 ,  H03M3/50 ,  H03M7/3024 ,  H03M7/3031

摘要： A method for generating an analog signal based on samples representing the analog signal, includes feeding the samples into a delta-sigma modulator, the delta-sigma modulator outputting a sequence of bits, and introducing a non-linear time-discrete function into a feedback loop between a quantizer element and a delta element of the delta-sigma modulator, where arguments of the non-linear time-discrete function include a current bit and at least one bit previous to the current bit.

摘要翻译： 一种用于基于表示模拟信号的样本产生模拟信号的方法，包括将样本馈送到Δ-Σ调制器中，Δ-Σ调制器输出比特序列，并将非线性时间离散函数引入反馈 量化器元件和Δ-Σ调制器的delta元件之间的环路，其中非线性时间离散函数的参数包括当前位和当前位之前的至少一个位。

公开(公告)号：US20050025274A1

公开(公告)日：2005-02-03

申请号：US10642781

申请日：2003-08-18

申请人： Jochen Rivoir

发明人： Jochen Rivoir

IPC分类号： G01R31/319 ,  G01R31/3193 ,  H04L7/033 ,  H04L7/02

CPC分类号： G01R31/31937 ,  H04L7/0334 ,  H04L7/0337

摘要： The present invention relates to a method for tracking transitions in a bit stream of a signal, said method comprising the steps of taking a first sample of said bit stream at a first sampling point of a first sampling sequence, taking a second sample of said bit stream at a second sampling point of said first sampling sequence, and taking a third sample of said bit stream at a third sampling point of said first sampling sequence, wherein said second sampling point is adjusted so that within a first time period, defined by said first and said second sampling points, the number of transitions in said bit stream is equal to the number of transitions within a second time period, defined by said second and said third sampling points.

摘要翻译： 本发明涉及一种用于跟踪信号比特流中的转换的方法，所述方法包括以下步骤：在第一采样序列的第一采样点处采集所述比特流的第一采样，采用所述比特的第二采样 在所述第一采样序列的第二采样点处流，并且在所述第一采样序列的第三采样点处采集所述位流的第三采样，其中调整所述第二采样点，使得在由所述第一采样序列定义的第一时间段内 第一和所述第二采样点，所述比特流中的转换次数等于由所述第二和所述第三采样点定义的第二时间段内的转换次数。

公开(公告)号：US09103887B2

公开(公告)日：2015-08-11

申请号：US10446568

申请日：2003-05-28

申请人： Jochen Rivoir

发明人： Jochen Rivoir

IPC分类号： H04L7/00 ,  G01R31/3193

CPC分类号： G01R31/31937 ,  G01R31/31926

摘要： The present invention relates to a method for adjusting transitions in a bit stream of a signal to be evaluated by comparison with a predetermined expected bit stream, comprising the steps of receiving said bit stream signal by a transition adjustment filter, providing a transition frame signal to said transition adjustment filter, said transition frame signal providing information for eliminating non-deterministic clock latencies within said bit stream of said received signal, and adjusting said bit stream of said received signal according to said transition frame signal resulting in an adjusted bit stream being in alignment to said expected bit stream.

摘要翻译： 本发明涉及一种用于通过与预定的预期比特流进行比较来调整要评估的信号的比特流中的转换的方法，包括以下步骤：通过转换调整滤波器接收所述比特流信号，提供转换帧信号 所述转移调整滤波器，所述转移帧信号提供用于消除所述接收信号的所述比特流内的非确定性时钟延迟的信息，以及根据所述转换帧信号调整所述接收信号的所述比特流，导致调整的比特流在 与所述预期位流对齐。

公开(公告)号：US20120256639A1

公开(公告)日：2012-10-11

申请号：US13502094

申请日：2009-10-21

申请人： Marco Pausini ,  Jochen Rivoir

发明人： Marco Pausini ,  Jochen Rivoir

IPC分类号： G01R29/26

CPC分类号： G01R31/31709

摘要： Embodiments of the invention provide an apparatus for measuring a phase noise of a test signal. The apparatus comprises a recursive delayer, a combiner and a phase noise determinator. The recursive delayer is configured to provide a delayed signal on the basis of the test signal. The combiner is configured to combine a first signal with a second signal to provide a combiner output signal. The first signal is based on the test signal or a signal identical to the test signal. The second signal is based on the delayed signal or a signal identical to the delayed signal. The phase noise determinator is configured to provide a phase noise information that depends on the combiner output signal.

摘要翻译： 本发明的实施例提供一种用于测量测试信号的相位噪声的装置。 该装置包括递归延迟器，组合器和相位噪声确定器。 递归延迟器被配置为基于测试信号提供延迟的信号。 组合器被配置为将第一信号与第二信号组合以提供组合器输出信号。 第一个信号是基于测试信号或与测试信号相同的信号。 第二信号基于延迟信号或与延迟信号相同的信号。 相位噪声确定器被配置为提供取决于组合器输出信号的相位噪声信息。