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1.发明授权
公开(公告)号：US4604651A
公开(公告)日：1986-08-05
申请号：US552656
申请日：1983-11-17
CPC分类号： H04N7/0137 , G06T3/40 , H04N3/22 , H04N7/01 , H04N7/0105 , Y10S348/91
摘要： In a television circuit arrangement for field and line frequency doubling and picture part magnification (zooming), in order to obtain the frequency doubling, information is written, alternately, into two field memories (M1, M2) during a field period having line periods at a given writing speed (clock frequency fc), whereby the reading from the field memories takes place at twice the writing speed. For a picture part magnification to be carried out in a simple manner, a magnification control circuit (TG, S3, S4, S11, S12) having a clock signal change-over circuit (S3, S4) is provided, as a result of which during writing, a higher writing speed (clock frequency 2fc) than the said given writing speed (clock frequency fc) is used during a part of the field periods and of the line periods, which part is substantially inversely proportional to the ratio between the higher writing speed and the given writing speed. For intermittent writing, one or more change-over circuits (S11, S12) are provided at the memory signal inputs, which provides, besides a more effective information storage and an improvement of the picture quality, the possibility of movement detection and recursive signal processing for noise reduction.
摘要翻译： 在用于场和线倍频和图像部分放大（缩放）的电视电路装置中，为了获得倍频，信息在具有行周期的场周期期间交替地写入两个场存储器（M1，M2） 给定的写入速度（时钟频率fc），由此来自场存储器的读取以两倍的写入速度进行。 为了简单地进行图像部分放大，提供了具有时钟信号转换电路（S3，S4）的倍率控制电路（TG，S3，S4，S11，S12），其结果是 在写入期间，在场周期和行周期的一部分期间使用比所述给定写入速度（时钟频率fc）更高的写入速度（时钟频率2fc），该部分与较高的时间段之间的比率基本上成反比 写速度和给定的写入速度。 对于间歇写入，在存储器信号输入处提供一个或多个转换电路（S11，S12），除了更有效的信息存储和图像质量的改进之外，提供了移动检测和递归信号处理的可能性 用于降噪。
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2.发明授权Movement-adaptive transversal-recursive noise suppression circuit for a television signal 失效用于电视信号的移动自适应横向递归噪声抑制电路
公开(公告)号：US4607284A
公开(公告)日：1986-08-19
申请号：US608673
申请日：1984-05-09
CPC分类号： H04N5/21
摘要： A movement-adaptive transversal-recursive noise suppression circuit for a television signal can be provided in a simple way with only a single control system (19) for changing from transversal to recursive filtering while maintaining optimum noise suppression. The circuit includes a first combining circuit having a first input for receiving the television signal, a delay circuit coupled to an output of the first combining circuit and a second combining circuit having a first input coupled to an output of the delay circuit and a second input coupled to the output of the first combining circuit, the output of the delay circuit being also coupled to a second input of the first combining circuit, and an output of the second combining circuit being the output of the noise suppression circuit.
摘要翻译： 用于电视信号的移动自适应横向递归噪声抑制电路可以以简单的方式提供，仅具有用于在保持最佳噪声抑制的同时从横向到递归滤波的单个控制系统（19）。 电路包括具有用于接收电视信号的第一输入端的第一组合电路，耦合到第一组合电路的输出的延迟电路和具有耦合到延迟电路的输出的第一输入的第二组合电路和第二输入 耦合到第一组合电路的输出，延迟电路的输出也耦合到第一组合电路的第二输入，第二组合电路的输出是噪声抑制电路的输出。
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公开(公告)号：US4435728A
公开(公告)日：1984-03-06
申请号：US340545
申请日：1982-01-18
CPC分类号： H04N7/0132 , H04N7/0105 , H04N7/0137
摘要： A field-frequency doubling circuit for a television signal having two field memories (23, 29) may alternatively be employed as a picture memory for the television signal when it is slightly extended by providing a re-write circuit (9, 11) and an adapted output circuit (17, 47) (FIG. 1). This picture memory may be included in, for example, a noise suppression circuit or a movement detector.
摘要翻译： 可替代地，具有两个场存储器（23,29）的电视信号的场倍频电路可用作电视信号的图像存储器，当通过提供重写电路（9,11）和 适配输出电路（17,47）（图1）。 该图像存储器可以包括在例如噪声抑制电路或移动检测器中。
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公开(公告)号：US4599710A
公开(公告)日：1986-07-08
申请号：US605958
申请日：1984-05-01
申请人： Marcellinus J. M. Pelgrom , Johannes G. Raven , Jan W. Slotboom , Hendrik A. Harwig , Marcellinus J. J. C. Annegarn
发明人： Marcellinus J. M. Pelgrom , Johannes G. Raven , Jan W. Slotboom , Hendrik A. Harwig , Marcellinus J. J. C. Annegarn
CPC分类号： G11C19/285 , G11C5/066 , G11C7/22 , G11C8/18
摘要： In a series-parallel-series memory circuit (3) which requires a write clock signal (at 19), a transfer clock signal (at 25) and a read clock signal (at 31), it is sufficient, because a clock signal processing circuit (23) is provided, to apply only two clock signals (to 33 and 35). Using a gate circuit (41), it is possible to obtain from one clock signal (applied to 35) additional information, which is provided by means of pulse duration variation, for adapting the time delay of the memory circuit (FIG. 1).
摘要翻译： 在需要写入时钟信号（at 19），传输时钟信号（25）和读取时钟信号（31））的串并联串行存储器电路（3）中，由于时钟信号处理 提供电路（23），仅施加两个时钟信号（至33和35）。 使用门电路（41），可以从一个时钟信号（施加到35）获得由脉冲持续时间变化提供的附加信息，以适应存储器电路（图1）的时间延迟。
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公开(公告)号：US4587557A
公开(公告)日：1986-05-06
申请号：US534443
申请日：1983-09-21
申请人： Laurens Doornhein , Johannes G. Raven , Petrus W. G. Welles , Marcellinus J. J. C. Annegarn , Antonius H. H. J. Nillesen
发明人： Laurens Doornhein , Johannes G. Raven , Petrus W. G. Welles , Marcellinus J. J. C. Annegarn , Antonius H. H. J. Nillesen
IPC分类号： H04N7/01
CPC分类号： H04N7/0105
摘要： In a field number conversion circuit, the mutual positions of the horizontal and vertical synchronizing signal pattern in a field of the television signal to be converted are measured by means of a measuring circuit (201) and these mutual positions are adequately transferred by means of a coupling circuit (203) to a corresponding field in the converted television signal. Reading the field memories (125, 127) used during the conversion operation is preferably effected at a clock frequency (at 53) which is not coupled to the clock frequency (at 23) used during the writing operation.
摘要翻译： 在场数转换电路中，通过测量电路（201）测量要转换的电视信号的场中的水平和垂直同步信号图形的相互位置，并且这些相互位置通过 耦合电路（203）到转换后的电视信号中的对应场。 读取在转换操作期间使用的场存储器（125,127）优选地在没有耦合到在写入操作期间使用的时钟频率（at 23）的时钟频率（在53处）来实现。
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6.发明授权
公开(公告)号：US4513388A
公开(公告)日：1985-04-23
申请号：US601093
申请日：1984-04-16
申请人： Hendrikus J. M. Veendrick , Leonardus C. M. G. Pfennings , Johannes G. Raven , Antonius H. H. J. Nillesen
发明人： Hendrikus J. M. Veendrick , Leonardus C. M. G. Pfennings , Johannes G. Raven , Antonius H. H. J. Nillesen
IPC分类号： G06F7/52 , G06F7/50 , G06F7/508 , G06F7/523 , G06F7/53 , G06F7/544 , G06F17/10 , H03H17/02 , H03H17/04 , H03K17/00 , G06F7/38
CPC分类号： G06F7/5443
摘要： A device is described for electronically executing a mathematical operation, being Z=KA+(1-K)B. It is also described how this device or how several of such devices can be used for the design of a number of realizations, such as a recursive filter, a digital mixer etc. The basic idea is the electronic implementation of a mathematical function for binary variables.
摘要翻译： 描述了用于电子地执行数学运算的装置，即Z = KA +（1-K）B。 还描述了该设备或者这些设备中的几个可以用于多个实现的设计，例如递归滤波器，数字混频器等。基本思想是用于二进制变量的数学函数的电子实现 。
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7.发明授权Video signal processing circuit providing noise suppression with reduced signal distortion 失效视频信号处理电路提供噪声抑制，减少信号失真
公开(公告)号：US4866523A
公开(公告)日：1989-09-12
申请号：US228862
申请日：1988-08-04
申请人： Johannes G. Raven
发明人： Johannes G. Raven
CPC分类号： H04N5/14
摘要： In a video signal processing circuit comprising a complementary filter circuit (3), a subtracting circuit (27) is coupled to an input (1, 5, 33, 29) and to an output (9, 13, 25) of filter (7). The output (9) of the filter (7) is coupled, via a signal path which comprises a noise suppression circuit (43), to a combining circuit (55) which is further coupled to an output (37) of the substracting circuit (27). In order to compensate for the distortion occuring in the signal path via the noise suppression circuit (43) as a result of conversions (13, 49), the distortion in the signal path from the output (9) of the filter (7) to the subtracting circuit is made equal thereto by applying the same conversions (13, 21).
摘要翻译： 在包括互补滤波器电路（3）的视频信号处理电路中，减法电路（27）耦合到滤波器（7）的输入端（1,5,33,29）和输出端（9,13,25） ）。 滤波器（7）的输出（9）经由包括噪声抑制电路（43）的信号路径耦合到组合电路（55），组合电路（55）还耦合到减法电路的输出（37） 27）。 为了补偿作为转换（13,49）的结果，通过噪声抑制电路（43）发生在信号路径中的失真，从滤波器（7）的输出（9）到信号路径的失真 通过应用相同的转换（13,21）使减法电路相等。
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公开(公告)号：US4492976A
公开(公告)日：1985-01-08
申请号：US416736
申请日：1982-09-10
CPC分类号： H04N7/012
摘要： A television receiving system for converting a video signal of one line standard to a video signal of another line standard. A field delay circuit is provided which separates the video signal of the one line standard into a high frequency and low frequency portion. The low frequency portion of the signal is processed to have a delay during one field different from the delay of a subsequent field. Independent processing means for the high frequency portion of the separated signal is provided. The processed high frequency and low frequency signals are combined to provide a video signal for converting to a different line standard. By processing the high frequency and low frequency portions of the video signal differently, a savings in hardware components is realized without material degradation in performance.
摘要翻译： 一种用于将一行标准的视频信号转换为另一行标准的视频信号的电视接收系统。 提供了将一行标准的视频信号分离成高频和低频部分的场延迟电路。 信号的低频部分被处理成在与随后的场的延迟不同的一个场期间具有延迟。 提供了用于分离信号的高频部分的独立处理装置。 经处理的高频和低频信号被组合以提供用于转换成不同线路标准的视频信号。 通过不同地处理视频信号的高频部分和低频部分，实现硬件部件的节省，而不会在性能上造成材料劣化。
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9.发明授权Television receiver including a circuit arrangement for demodulating an NTSC-coded color signal 失效电视接收机，包括用于解调NTSC编码的彩色信号的电路装置
公开(公告)号：US4710802A
公开(公告)日：1987-12-01
申请号：US836034
申请日：1986-03-04
CPC分类号： H04N11/146
摘要： A color television signal receiver includes a circuit arrangement for demodulating an NTSC-encoded chrominance signal available as a sequence of digital values. An oscillator circuit (33), which has an accumulator (16) and a waveform converter (31) produces two sine-shaped reference signals which are applied to a demodulator circuit (2). The accumulator (16) includes a register (18) and a (first) modulo-adder (17). A phase comparator circuit (12) controlling the phase of the reference signal receives at least one demodulated signal during the occurrence of the color synchronizing signal. The sawtooth-shaped accumulator output signal is added in a second adder (26, 38) during a first switching position of a change-over switch (23, 34) to an adjustable value and is thereafter applied to the waveform converter (31). In the second switching position of the change-over switch (23, 34), which only occurs during the occurrence of the color synchronizing signal, the accumulator output signal is applied unchanged to the waveform converter (31).
摘要翻译： 彩色电视信号接收机包括用于解调可用作数字值序列的NTSC编码色度信号的电路装置。 具有累加器（16）和波形转换器（31）的振荡器电路（33）产生施加到解调器电路（2）的两个正弦参考信号。 累加器（16）包括寄存器（18）和（第一）模加法器（17）。 控制参考信号的相位的相位比较器电路（12）在彩色同步信号发生期间接收至少一个解调信号。 在转换开关（23,34）的第一开关位置期间，锯齿形累加器输出信号在第二加法器（26,38）中相加到可调整值，然后施加到波形转换器（31）。 在转换开关（23,34）的仅在彩色同步信号发生时发生的第二切换位置中，累加器输出信号不变地施加到波形转换器（31）。
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公开(公告)号：US4393396A
公开(公告)日：1983-07-12
申请号：US288250
申请日：1981-07-27
摘要： In a noise suppression circuit for a video signal the number of elements required can be reduced when a separation circuit (3) for a high-frequency and a low-frequency component is used and the noise suppression is effected in the low-frequency component by means of a comb filter (19) which, in order to realize a still further savings in components, may comprise a delay circuit having a delay (103, 105, 107) which is switchable between a field period plus half a line period and a field period minus half a line period. The noise suppression circuit is therefore particularly suitable for use in television receivers.
摘要翻译： 在用于视频信号的噪声抑制电路中，当使用用于高频和低频分量的分离电路（3）并且通过在低频分量中进行噪声抑制时，可以减少所需要的元件数量 梳状滤波器（19）的装置，为了实现部件的进一步节省，可以包括具有延迟（103,105,107）的延迟电路，该延迟电路可以在场周期加一半行周期和 场期减半行周期。 因此，噪声抑制电路特别适用于电视接收机。
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