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1.发明申请公开(公告)号：US20100194624A1
公开(公告)日：2010-08-05
申请号：US12363297
申请日：2009-01-30
IPC分类号： G01S7/40
摘要： An apparatus for simultaneous calibration and communication of active arrays of a satellite may include a base transmitter, a satellite receiver, a satellite transmitter, a base receiver, and at least one computer. The apparatus may simultaneously transmit and receive a calibration carrier and a communication carrier at different frequencies in order to calibrate the apparatus using the calibration carrier without interrupting the communication carrier. The use of different frequencies may avoid interference between the calibration and communication carriers.
摘要翻译： 用于卫星的有源阵列的同时校准和通信的装置可以包括基站发射机，卫星接收机，卫星发射机，基站接收机和至少一个计算机。 该装置可以同时发送和接收不同频率的校准载体和通信载体，以便在不中断通信载体的情况下使用校准载体校准装置。 使用不同的频率可以避免校准和通信载体之间的干扰。
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2.发明授权公开(公告)号：US07825852B2
公开(公告)日：2010-11-02
申请号：US12363297
申请日：2009-01-30
IPC分类号： G01S7/40
摘要： An apparatus for simultaneous calibration and communication of active arrays of a satellite may include a base transmitter, a satellite receiver, a satellite transmitter, a base receiver, and at least one computer. The apparatus may simultaneously transmit and receive a calibration carrier and a communication carrier at different frequencies in order to calibrate the apparatus using the calibration carrier without interrupting the communication carrier. The use of different frequencies may avoid interference between the calibration and communication carriers.
摘要翻译： 用于卫星的有源阵列的同时校准和通信的装置可以包括基站发射机，卫星接收机，卫星发射机，基站接收机和至少一个计算机。 该装置可以同时发送和接收不同频率的校准载体和通信载体，以便在不中断通信载体的情况下使用校准载体校准装置。 使用不同的频率可以避免校准和通信载体之间的干扰。
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公开(公告)号：US5353033A
公开(公告)日：1994-10-04
申请号：US48633
申请日：1993-04-15
申请人： Irwin L. Newberg , Joseph P. Smalanskas , Ronald I. Wolfson , John J. Wooldridge , Howard S. Nussbaum
发明人： Irwin L. Newberg , Joseph P. Smalanskas , Ronald I. Wolfson , John J. Wooldridge , Howard S. Nussbaum
CPC分类号： H01Q3/2676
摘要： A true time delay phased array is provided which includes a digital subarray interface in the transmit signal path. The digital transmit signal path interface includes a digital reference signal generation means and digital signal propagation means for supplying the digital reference signal to the subarray. Each subarray includes RF carrier signal generating means for generating an RF carrier signal phase coherent with the reference signal, a fiber optic true time delay circuit for applying an appropriate phase delay to the RF carrier and an appropriate true time delay to the modulation signal, and a waveform modulator for modulating the modulating signal onto the phase locked RF carrier signal to provide the transmit signal for the subarray. The present invention can be used in conjunction with existing digital interface technology for receive and control signal paths to provide an entirely digital subarray signal path interface.
摘要翻译： 提供了真正的时间延迟相控阵列，其包括发射信号路径中的数字子阵列接口。 数字发送信号路径接口包括用于将数字参考信号提供给子阵列的数字参考信号产生装置和数字信号传播装置。 每个子阵列包括用于产生与参考信号相干的RF载波信号相位的RF载波信号产生装置，用于向RF载波施加适当的相位延迟的光纤真实时间延迟电路和对调制信号的适当的真实时间延迟;以及 波形调制器，用于将调制信号调制到锁相RF载波信号上，以提供子阵列的发射信号。 本发明可以与用于接收和控制信号路径的现有数字接口技术结合使用，以提供完全数字子阵列信号路径接口。
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公开(公告)号：US20080297402A1
公开(公告)日：2008-12-04
申请号：US11386909
申请日：2006-03-22
申请人： John J. Wooldridge
发明人： John J. Wooldridge
IPC分类号： G01S7/40
CPC分类号： H01Q3/267 , G01S7/024 , G01S7/4004 , G01S2013/0254
摘要： Array antenna calibration verification coupling interrogator and responder with mode-related interrogation signal having a previous calibration phase angle, producing in responder a characteristic interrogation response. Conjugate signal is generated by reversing phase of interrogation signal, producing in responder a characteristic conjugate response. Interrogation and conjugate responses sensed and combined to determine difference characteristic for responder array element. Responder difference characteristic iteratively determined for elements in antenna array representative of present calibration verification state. Present and previous calibration verification states compared, with significant variation adapting array to desired calibration verification state. Verification processor controls interrogator, responders, and signals providing built-in missile RADAR calibration verification.
摘要翻译： 阵列天线校准验证耦合询问器和响应器具有具有先前校准相位角的模式相关询问信号，在响应器中产生特征询问响应。 共轭信号通过询问信号的反相产生，在响应者中产生特征共轭响应。 讯号和共轭响应的检测和组合，以确定响应者阵列元素的差异特征。 响应者差异特征迭代地确定天线阵列中表示当前校准验证状态的元件。 比较现有和以前的校准验证状态，具有显着的变化适应阵列到所需的校准验证状态。 验证处理器控制询问器，响应者和提供内置导弹雷达校准验证的信号。
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5.发明授权
公开(公告)号：US5644277A
公开(公告)日：1997-07-01
申请号：US553946
申请日：1995-11-06
申请人： Jon J. Gulick , John J. Wooldridge
发明人： Jon J. Gulick , John J. Wooldridge
IPC分类号： H01P3/02 , G01S7/28 , H01L23/498 , H01L23/538 , H01L23/66 , H01P3/08 , H01P5/02 , H01P5/00
CPC分类号： H01L23/5384 , H01L23/49827 , H01L23/66 , H01L2223/6616 , H01L2223/6627 , H01L2224/16 , H01L2924/10329 , H01L2924/15173 , H01L2924/1903 , H01L2924/19033 , H01L2924/3011 , H01L2924/3025
摘要： A vertical interconnect structure comprising a three-wire-line transmission line structure for providing electrical continuity between different levels of a multilevel substrate. The present invention provides a means for transferring power between various levels of the substrate without introducing excessive additional RE losses. First and second coplanar transmission line structures are disposed on first and second surfaces of the substrate. A vertical interconnect structure is disposed in the multilevel RF substrate and is coupled between the first and second transmission line structures. The vertical interconnect structure comprises three conductors having predetermined cross-sectional dimensions and predetermined separations therebetween that are adapted to transfer RE power between the first and second transmission line structures. In a completed electronic circuit employing the present invention, an electronic device is electrically coupled between two coplanar transmission line structures disposed on one surface of the substrate, and the vertical interconnect structure couples power to the electronic circuit by way of the coplanar transmission line structure disposed another surface of the substrate. The impedance of the vertical interconnect structure is determined by the relative dimensions of the three conductors and their relative separations. The three-wire-line transmission line structure supports a highly desirable TEM mode of energy propagation. The present invention is relatively easy to fabricate, in that vertical wires having a circular geometry are easily accommodated as part of the fabrication process for the substrate. The present invention provides for relatively low loss, because of the nature of the currents that flow on the conductors. The propagation characteristics are well-understood, and the vertical interconnect structure supports a highly desirable TEM mode of energy propagation.
摘要翻译： 一种垂直互连结构，包括用于在多层基板的不同层次之间提供电连续性的三线制传输线结构。 本发明提供了一种在不引入额外的额外RE损耗的情况下在不同层次的衬底之间传递功率的装置。 第一和第二共面传输线结构设置在基板的第一和第二表面上。 垂直互连结构设置在多电平RF衬底中并耦合在第一和第二传输线结构之间。 垂直互连结构包括具有预定横截面尺寸和其间的预定间隔的三个导体，其适于在第一和第二传输线结构之间传送RE功率。 在使用本发明的完整的电子电路中，电子器件电耦合在设置在衬底的一个表面上的两个共面传输线结构之间，并且垂直互连结构通过所设置的共面传输线结构将功率耦合到电子电路 衬底的另一表面。 垂直互连结构的阻抗由三根导线的相对尺寸及其相对间距决定。 三线制传输线结构支持高度可取的TEM模式的能量传播。 本发明相对容易制造，因为具有圆形几何形状的垂直导线容易被容纳作为衬底制造工艺的一部分。 由于在导体上流动的电流的性质，本发明提供相对较低的损耗。 传播特性是很好理解的，垂直互连结构支持高度期望的TEM模式的能量传播。
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公开(公告)号：US5493305A
公开(公告)日：1996-02-20
申请号：US48635
申请日：1993-04-15
CPC分类号： H01Q21/0025 , H01Q21/0087
摘要： An electronic device operating in the microwave frequency range having components disposed in a plurality of planes, wherein the planes are stacked vertically. The electronic device is a T/R module or element forming a part of a subarray used in an active array radar. The T/R module or element comprises a transmit chip, a receive chip, low noise amplifiers, a phase shifter, an attenuator, switches, dc power supply, interconnects that interconnect the foregoing components and logic circuits to control the foregoing components. The components when stacked in a 3-D package are disposed behind a radiator or antenna, which transmits and receives the microwave signals. Behind the T/R module or element is a manifold which provides input and output to and from the T/R module or element. The microwave chips of the T/R module are monolithic microwave integrated circuit chips and control logic, which are disposed in an aluminum nitride substrate and coated with a conformal hermetic coating. The 3-D chip package can optionally include micro channel cooling by adding additional layers. The integrated circuits also employ a flip chip design for mounting to the wafers. Optional photonic interconnects could be used for communication between levels in the 3-D package and can be used between subarrays as a manifold.
摘要翻译： 一种在微波频率范围内工作的电子设备，其具有设置在多个平面中的部件，其中所述平面垂直堆叠。 电子设备是形成在有源阵列雷达中使用的子阵列的一部分的T / R模块或元件。 T / R模块或元件包括发射芯片，接收芯片，低噪声放大器，移相器，衰减器，开关，直流电源，互连上述组件的互连和逻辑电路以控制前述组件。 堆叠在3-D封装中的部件设置在发射和接收微波信号的散热器或天线后面。 T / R模块或元件后面是向T / R模块或元件提供输入和输出的歧管。 T / R模块的微波芯片是单片微波集成电路芯片和控制逻辑，它们设置在氮化铝衬底中并涂覆有保形密封涂层。 3-D芯片封装可以通过添加附加层来选择性地包括微通道冷却。 集成电路还采用倒装芯片设计来安装到晶片。 可选的光子互连可以用于3-D封装中的电平之间的通信，并且可以在作为歧管的子阵列之间使用。
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7.发明授权Microwave compression interconnect using dielectric filled three-wire line with compressible conductors 失效使用具有可压缩导体的电介质填充三线制微波压缩互连
公开(公告)号：US5675302A
公开(公告)日：1997-10-07
申请号：US632865
申请日：1996-04-16
CPC分类号： H05K1/0243 , H01P1/047 , H01P3/02 , H05K2201/09809 , H05K3/325 , H05K3/368
摘要： A microwave frequency three-wire transmission line provides the capability of solderless interconnections between stacked microwave hybrid and printed wiring board (PWB) assemblies. Three wire-like compressible conductors are embedded in a dielectric support member. Each compressible conductor is realized by densely packing thin wire into an opening in the supporting dielectric. The dielectric preferably has a metal shielding surrounding the outer periphery to suppress higher order modes. A vertical right angle bend transition uses the transmission line to interconnect between grounded coplanar waveguide (GCPW) transmission lines. This orthogonal transition uses button spring contacts, thus creating a reusable solderless vertical interconnection between the two transmission lines. This transition can operate from DC to greater than 15 GHz with good match and low loss, and allows a transition from a GCPW transmission line on a first substrate to another GCPW transmission line on a second substrate stacked above the first substrate.
摘要翻译： 微波频率三线传输线提供堆叠微波混合和印刷线路板（PWB）组件之间无焊接互连的能力。 三根线状可压缩导体嵌入在电介质支撑构件中。 每个可压缩导体通过将细丝密集地包装到支撑电介质的开口中来实现。 电介质优选具有围绕外周的金属屏蔽以抑制较高阶模。 垂直直角弯曲转变使用传输线在接地的共面波导（GCPW）传输线之间进行互连。 该正交转换使用按钮弹簧触点，从而在两个传输线之间产生可重复使用的无焊接垂直互连。 该转换可以从DC到大于15GHz，具有良好的匹配和低损耗，并且允许从第一衬底上的GCPW传输线到堆叠在第一衬底上的第二衬底上的另一个GCPW传输线的转变。
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8.发明授权Single substrate microwave radar transceiver including flip-chip integrated circuits 失效单片式微波雷达收发器，包括片式芯片集成电路
公开(公告)号：US5115245A
公开(公告)日：1992-05-19
申请号：US576915
申请日：1990-09-04
申请人： Cheng P. Wen , Gregory S. Mendolia , Mario Siracusa , Joseph J. Maieron , William D. Higdon , John J. Wooldridge , Jon Gulick
发明人： Cheng P. Wen , Gregory S. Mendolia , Mario Siracusa , Joseph J. Maieron , William D. Higdon , John J. Wooldridge , Jon Gulick
CPC分类号： H01P11/00 , G01S7/032 , H01P1/047 , H01P5/02 , H01Q21/065 , G01S2013/9378 , G01S2013/9389
摘要： A microwave radar transceiver assembly (30) includes a monolithic microwave integrated circuit (MMIC) chip (58) having a coplanar waveguide transmssion lines (100, 102, 104) formed on the same surface (58a) as the electronic elements thereof. Coplanar waveguide transmission lines (68, 70, 72) are also formed on a surface (62a) of a substrate (62). The transceiver chip (58), in addition to other chips (56, 60), are mounted on the substrate (62) in a flip-chip arrangement, with the respective surfaces (58a, 62a) on which the transmission lines (100, 102, 104; 68, 70, 72) are formed facing each other. Electrically conductive bumps (106, 108, 110) are formed on portions of the transmission lines (100, 102, 104) of the chips (56, 58, 60) which are to be interconneced with the transmission lines (68, 70, 72) of the substrate (62), and solder (114) is formed on the portions of the transmission line (68, 70, 72) of the substrate (62) which are to be interconnected with the transmission lines (100, 102, 104) of the chips (56, 68, 60). The bumps (106, 108, 110) provide spacing between the mating surfaces (58a, 62a) of the substrate (62) and chips (56, 68, 60), and isolation between electronic elements on the chips (56, 58, 60).
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公开(公告)号：US07471237B2
公开(公告)日：2008-12-30
申请号：US11386909
申请日：2006-03-22
申请人： John J. Wooldridge
发明人： John J. Wooldridge
CPC分类号： H01Q3/267 , G01S7/024 , G01S7/4004 , G01S2013/0254
摘要： Array antenna calibration verification coupling interrogator and responder with mode-related interrogation signal having a previous calibration phase angle, producing in responder a characteristic interrogation response. Conjugate signal is generated by reversing phase of interrogation signal, producing in responder a characteristic conjugate response. Interrogation and conjugate responses sensed and combined to determine difference characteristic for responder array element. Responder difference characteristic iteratively determined for elements in antenna array representative of present calibration verification state. Present and previous calibration verification states compared, with significant variation adapting array to desired calibration verification state. Verification processor controls interrogator, responders, and signals providing built-in missile RADAR calibration verification.
摘要翻译： 阵列天线校准验证耦合询问器和响应器具有具有先前校准相位角的模式相关询问信号，在响应器中产生特征询问响应。 共轭信号通过询问信号的反相产生，在响应者中产生特征共轭响应。 讯号和共轭响应的检测和组合，以确定响应者阵列元素的差异特征。 响应者差异特征迭代地确定天线阵列中表示当前校准验证状态的元件。 比较现有和以前的校准验证状态，具有显着的变化适应阵列到所需的校准验证状态。 验证处理器控制询问器，响应者和提供内置导弹雷达校准验证的信号。
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公开(公告)号：US07324042B2
公开(公告)日：2008-01-29
申请号：US11274372
申请日：2005-11-15
申请人： Paul C. Werntz , John J. Wooldridge
发明人： Paul C. Werntz , John J. Wooldridge
CPC分类号： G01S7/2813 , G01S13/90 , G01S2013/0245
摘要： A method and system for optimizing transmit beam and receive beam antenna radiation patterns. The method includes inputting initial estimate of beam weights for a transmit beam and a receive beam to an optimizer; and using a cost function to optimize beam weights so that a response peaks in a main region and is minimized in a sidelobe region; wherein the cost function is based on using receive beam and transmit beam characteristics.
摘要翻译： 一种用于优化发射波束和接收波束天线辐射图的方法和系统。 该方法包括将发射波束和接收波束的波束权重的初始估计输入到优化器; 并且使用成本函数来优化波束权重，使得响应在主区域中峰值并且在旁瓣区域中被最小化; 其中所述成本函数基于使用接收波束和发射波束特性。
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