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1.发明申请METHOD AND APPARATUS FOR CONTROLLING QUBITS WITH SINGLE FLUX QUANTUM LOGIC 有权用单通道量子逻辑控制QUBITS的方法和装置公开(公告)号：US20110133770A1
公开(公告)日：2011-06-09
申请号：US13022276
申请日：2011-02-07
申请人： John Xavier PRZYBYSZ , James E. Baumgardner , Aaron A. Pesetski , Donald Lynn Miller , Quentin P. Herr
发明人： John Xavier PRZYBYSZ , James E. Baumgardner , Aaron A. Pesetski , Donald Lynn Miller , Quentin P. Herr
IPC分类号： H03K19/195
CPC分类号： B82Y10/00 , G06N99/002
摘要： In one embodiment, the disclosure relates to a method and apparatus for controlling the energy state of a qubit by bringing the qubit into and out of resonance by coupling the qubit to a flux quantum logic gate. The qubit can be in resonance with a pump signal, with another qubit or with some quantum logic gate. In another embodiment, the disclosure relates to a method for controlling a qubit with RSFQ logic or through the interface between RSFQ and the qubit.
摘要翻译： 在一个实施例中，本公开涉及通过将量子位耦合到通量量子逻辑门来使量子比特进入和退出谐振来控制量子位的能量状态的方法和装置。 量子位可以与泵浦信号共振，具有另一个量子位或一些量子逻辑门。 在另一个实施例中，本公开涉及一种用RSFQ逻辑或通过RSFQ与量子比特之间的接口来控制量子比特的方法。
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2.发明授权公开(公告)号：US08138784B2
公开(公告)日：2012-03-20
申请号：US13022276
申请日：2011-02-07
申请人： John Xavier Przybysz , James E. Baumgardner , Aaron A. Pesetski , Donald Lynn Miller , Quentin P. Herr
发明人： John Xavier Przybysz , James E. Baumgardner , Aaron A. Pesetski , Donald Lynn Miller , Quentin P. Herr
IPC分类号： H03K19/195
CPC分类号： B82Y10/00 , G06N99/002
摘要： In one embodiment, the disclosure relates to a method and apparatus for controlling the energy state of a qubit by bringing the qubit into and out of resonance by coupling the qubit to a flux quantum logic gate. The qubit can be in resonance with a pump signal, with another qubit or with some quantum logic gate. In another embodiment, the disclosure relates to a method for controlling a qubit with RSFQ logic or through the interface between RSFQ and the qubit.
摘要翻译： 在一个实施例中，本公开涉及通过将量子位耦合到通量量子逻辑门来使量子比特进入和退出谐振来控制量子位的能量状态的方法和装置。 量子位可以与泵浦信号共振，具有另一个量子位或一些量子逻辑门。 在另一个实施例中，本公开涉及一种用RSFQ逻辑或通过RSFQ与量子比特之间的接口来控制量子比特的方法。
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公开(公告)号：US07772871B2
公开(公告)日：2010-08-10
申请号：US12111035
申请日：2008-04-28
IPC分类号： H03K19/195
CPC分类号： H03K3/38
摘要： The disclosure relates to a method for providing a logic circuit element. The method includes arranging a series of Josephson junctions between a first Josephson junction and a second Josephson junction, the first Josephson junction having a first critical current (Ic1) and the second Josephson junction having a second critical current (Ic2); providing a working current to the first Josephson junction, the working current transmitting to the second Josephson junction through the series of the Josephson junctions; wherein the working current is sufficiently high to trigger the second Josephson junction while sufficiently low to not disturb super-conductivity of the series of intermediate Josephson junctions.
摘要翻译： 本公开涉及提供逻辑电路元件的方法。 该方法包括在第一约瑟夫逊结和第二约瑟夫逊结之间布置一系列约瑟夫逊结，第一约瑟夫逊结具有第一临界电流（Ic1），第二约瑟夫逊结具有第二临界电流（Ic2）; 向第一个约瑟夫逊结提供工作电流，工作电流通过一系列约瑟夫逊路传输到第二个约瑟夫逊路口; 其中工作电流足够高以触发第二约瑟夫逊结，同时足够低以不干扰一系列中间约瑟夫逊结的超导电性。
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公开(公告)号：US20090267635A1
公开(公告)日：2009-10-29
申请号：US12111035
申请日：2008-04-28
IPC分类号： H03K19/195
CPC分类号： H03K3/38
摘要： The disclosure relates to a method for providing a logic circuit element. The method includes arranging a series of Josephson junctions between a first Josephson junction and a second Josephson junction, the first Josephson junction having a first critical current (Ic1) and the second Josephson junction having a second critical current (Ic2); providing a working current to the first Josephson junction, the working current transmitting to the second Josephson junction through the series of the Josephson junctions; wherein the working current is sufficiently high to trigger the second Josephson junction while sufficiently low to not disturb super-conductivity of the series of intermediate Josephson junctions.
摘要翻译： 本公开涉及提供逻辑电路元件的方法。 该方法包括在第一约瑟夫逊结和第二约瑟夫逊结之间布置一系列约瑟夫逊结，第一约瑟夫逊结具有第一临界电流（Ic1），第二约瑟夫逊结具有第二临界电流（Ic2）; 向第一个约瑟夫逊结提供工作电流，工作电流通过一系列约瑟夫逊路传输到第二个约瑟夫逊路口; 其中工作电流足够高以触发第二约瑟夫逊结，同时足够低以不干扰一系列中间约瑟夫逊结的超导电性。
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公开(公告)号：US20100033252A1
公开(公告)日：2010-02-11
申请号：US12186465
申请日：2008-08-05
IPC分类号： H03F3/60
摘要： The disclosure generally relates to a method and apparatus for providing high-speed, low signal power amplification. In an exemplary embodiment, the disclosure relates to a method for providing a wideband amplification of a signal by forming a first transmission line in parallel with a second transmission line, each of the first transmission line and the second transmission line having a plurality of superconducting transmission elements, each transmission line having a transmission line delay; interposing a plurality of amplification stages between the first transmission line and the second transmission line, each amplification stage having an resonant circuit with a resonant circuit delay; and substantially matching the resonant circuit delay for at least one of the plurality of amplification stages with the transmission line delay of at least one of the superconducting transmission lines.
摘要翻译： 本公开一般涉及用于提供高速，低信号功率放大的方法和装置。 在示例性实施例中，本发明涉及一种用于通过与第二传输线并联形成第一传输线来提供信号的宽带放大的方法，所述第一传输线和第二传输线中的每一条具有多个超导传输 每个传输线具有传输线延迟; 在第一传输线和第二传输线之间插入多个放大级，每个放大级具有谐振电路延迟的谐振电路; 并且使所述多个放大级中的至少一个的所述谐振电路延迟与至少一个超导传输线的传输线延迟基本匹配。
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公开(公告)号：US20100026538A1
公开(公告)日：2010-02-04
申请号：US12184204
申请日：2008-07-31
IPC分类号： H03M3/02
摘要： A second order superconductor delta-sigma analog-to-digital modulator having an input for receiving an analog signal, a first integrator coupled to the input, a second integrator cascaded with the first integrator, and a quantum comparator digitizing output from the second integrator reduces quantization noise by providing matched quantum accurate DACs in a feedback loop between output from the quantum comparator and input to the first integrator. The matched quantum accurate feedback DACs produce identically repeatable voltage pulses, may be configured for multi-bit output, may be time-interleaved to permit higher clocking rates, and may be employed in a balanced bipolar configuration to allow inductive input coupling. Bipolar feedback is balanced when gain of a first DAC exceeds gain of a matched, opposite polarity DAC by the amount of implicit feedback from the comparator into the second integrator.
摘要翻译： 具有用于接收模拟信号的输入端的第二级超导体Δ-Σ模数转换器，耦合到输入端的第一积分器，与第一积分器级联的第二积分器和来自第二积分器的量子比较器数字化输出减小 通过在量子比较器的输出和第一积分器的输出之间的反馈回路中提供匹配的量子精确DAC来进行量化噪声。 匹配的量子精确反馈DAC产生相同可重复的电压脉冲，可以被配置用于多位输出，可以被时间交织以允许更高的时钟速率，并且可以采用平衡双极配置来允许电感输入耦合。 当第一个DAC的增益超过匹配的相反极性DAC的增益时，双极反馈被平衡，这是由比较器到第二个积分器的隐含反馈量。
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公开(公告)号：US09905900B2
公开(公告)日：2018-02-27
申请号：US14702044
申请日：2015-05-01
IPC分类号： H03K19/195 , H01P3/06 , H03K3/38
CPC分类号： H01P3/06 , H03K3/38 , H03K19/195
摘要： A microwave circuit is provided that comprises a plurality of transmission lines each configured to receive and propagate a respective waveform signal of a plurality of waveform signals, and a combiner that receives and combines the plurality of waveform signals from outputs of the plurality of transmission lines into a combined output waveform signal that is output terminated by an output termination resistor. The microwave circuit further comprises a compensation signal generator that generates a compensation signal to mitigate reflections associated with the transmission of signals through the microwave circuit.
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公开(公告)号：US07982646B2
公开(公告)日：2011-07-19
申请号：US12184204
申请日：2008-07-31
IPC分类号： H03M3/00
摘要： A second order superconductor delta-sigma analog-to-digital modulator having an input for receiving an analog signal, a first integrator coupled to the input, a second integrator cascaded with the first integrator, and a quantum comparator digitizing output from the second integrator reduces quantization noise by providing matched quantum accurate DACs in a feedback loop between output from the quantum comparator and input to the first integrator. The matched quantum accurate feedback DACs produce identically repeatable voltage pulses, may be configured for multi-bit output, may be time-interleaved to permit higher clocking rates, and may be employed in a balanced bipolar configuration to allow inductive input coupling. Bipolar feedback is balanced when gain of a first DAC exceeds gain of a matched, opposite polarity DAC by the amount of implicit feedback from the comparator into the second integrator.
摘要翻译： 具有用于接收模拟信号的输入端的第二级超导体Δ-Σ模数转换器，耦合到输入端的第一积分器，与第一积分器级联的第二积分器和来自第二积分器的量子比较器数字化输出减小 通过在量子比较器的输出和第一积分器的输出之间的反馈回路中提供匹配的量子精确DAC来进行量化噪声。 匹配的量子精确反馈DAC产生相同可重复的电压脉冲，可以被配置用于多位输出，可以被时间交织以允许更高的时钟速率，并且可以采用平衡双极配置来允许电感输入耦合。 当第一个DAC的增益超过匹配的相反极性DAC的增益时，双极反馈被平衡，这是由比较器到第二个积分器的隐含反馈量。
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公开(公告)号：US07852106B2
公开(公告)日：2010-12-14
申请号：US12773055
申请日：2010-05-04
IPC分类号： H03K19/195
CPC分类号： H03K19/1954 , B82Y10/00 , G06N99/002 , H03K17/92 , H03K19/0008 , H03K19/1952 , H03K2217/0036
摘要： In one embodiment, the disclosure relates to a single flux quantum (SFQ) signal transmission line powered by an AC power source. The AC power source supplies power to a transformer having a primary winding and a secondary winding. The primary winding receives the AC signal and the secondary winding communicates the signal to the SFQ transmission line. The transmission line can optionally include an input filter circuit for receiving the incoming SFQ pulse. The filter circuit can have a resistor and an inductor connected in parallel. In an alternative arrangement, the filter circuit can comprise of an inductor. A first Josephson junction can be connected to the filter circuit and to the secondary winding. The Josephson junction triggers in response to the incoming SFQ pulse and regenerates a pulse signal in response to a power discharge from the secondary winding.
摘要翻译： 在一个实施例中，本公开涉及由AC电源供电的单通量量子（SFQ）信号传输线。 交流电源向具有初级绕组和次级绕组的变压器供电。 初级绕组接收AC信号，次级绕组将信号传送到SFQ传输线。 传输线可以可选地包括用于接收进入的SFQ脉冲的输入滤波器电路。 滤波电路可以具有并联连接的电阻器和电感器。 在替代布置中，滤波器电路可以包括电感器。 第一个约瑟夫逊结可以连接到滤波电路和次级绕组。 约瑟夫逊连接点响应于输入的SFQ脉冲触发并响应于来自次级绕组的功率放电而重新产生脉冲信号。
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公开(公告)号：US20100207657A1
公开(公告)日：2010-08-19
申请号：US12773055
申请日：2010-05-04
IPC分类号： H03K19/195
CPC分类号： H03K19/1954 , B82Y10/00 , G06N99/002 , H03K17/92 , H03K19/0008 , H03K19/1952 , H03K2217/0036
摘要： In one embodiment, the disclosure relates to a single flux quantum (SFQ) signal transmission line powered by an AC power source. The AC power source supplies power to a transformer having a primary winding and a secondary winding. The primary winding receives the AC signal and the secondary winding communicates the signal to the SFQ transmission line. The transmission line can optionally include an input filter circuit for receiving the incoming SFQ pulse. The filter circuit can have a resistor and an inductor connected in parallel. In an alternative arrangement, the filter circuit can comprise of an inductor. A first Josephson junction can be connected to the filter circuit and to the secondary winding. The Josephson junction triggers in response to the incoming SFQ pulse and regenerates a pulse signal in response to a power discharge from the secondary winding.
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