利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

14 条记录 (耗时 0.026 秒)

    Electrode line structure having fine line width and method of forming the same
    3.
    发明申请
    Electrode line structure having fine line width and method of forming the same 有权
    具有细线宽度的电极线结构及其形成方法

    公开(公告)号：US20070166885A1

    公开(公告)日：2007-07-19

    申请号：US11651322

    申请日：2007-01-09

    申请人： Joo-won Lee ,  Kang-soo Chu ,  Jae-eun Park ,  Jong-ho Yang

    发明人： Joo-won Lee ,  Kang-soo Chu ,  Jae-eun Park ,  Jong-ho Yang

    IPC分类号： H01L21/00

    CPC分类号： H01L27/10888 ,  H01L23/5283 ,  H01L27/10891 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In an electrode line structure of a semiconductor device and a method for forming the same, the electrode line structure comprises a semiconductor substrate, and electrode lines, which are formed on the semiconductor substrate, and have an inclined end in the long axis direction. The electrode lines each include a first line unit, which substantially functions as an electrode line, a second line unit, which has an inclined end in the long axis direction and is separated from the first line unit by a predetermined distance, and an insulating plug, which is interposed between the first line unit and the second line unit and electrically insulates the first line unit from the second line unit.

    摘要翻译： 在半导体器件的电极线结构及其形成方法中，电极线结构包括半导体衬底和形成在半导体衬底上并在长轴方向上具有倾斜端的电极线。 电极线各自包括基本上用作电极线的第一线单元，在长轴方向上具有倾斜端并与第一线单元隔开预定距离的第二线单元，以及绝缘插头 ，其插入在第一线路单元和第二线路单元之间，并且将第一线路单元与第二线路单元电绝缘。

    Electrode line structure having fine line width and method of forming the same
    4.
    发明授权
    Electrode line structure having fine line width and method of forming the same 有权
    具有细线宽度的电极线结构及其形成方法

    公开(公告)号：US07510969B2

    公开(公告)日：2009-03-31

    申请号：US11651322

    申请日：2007-01-09

    申请人： Joo-won Lee ,  Kang-soo Chu ,  Jae-eun Park ,  Jong-ho Yang

    发明人： Joo-won Lee ,  Kang-soo Chu ,  Jae-eun Park ,  Jong-ho Yang

    IPC分类号： H01L21/44

    CPC分类号： H01L27/10888 ,  H01L23/5283 ,  H01L27/10891 ,  H01L2924/0002 ,  H01L2924/00

    摘要： In an electrode line structure of a semiconductor device and a method for forming the same, the electrode line structure comprises a semiconductor substrate, and electrode lines, which are formed on the semiconductor substrate, and have an inclined end in the long axis direction. The electrode lines each include a first line unit, which substantially functions as an electrode line, a second line unit, which has an inclined end in the long axis direction and is separated from the first line unit by a predetermined distance, and an insulating plug, which is interposed between the first line unit and the second line unit and electrically insulates the first line unit from the second line unit.

    摘要翻译： 在半导体器件的电极线结构及其形成方法中，电极线结构包括半导体衬底和形成在半导体衬底上并在长轴方向上具有倾斜端的电极线。 电极线各自包括基本上用作电极线的第一线单元，在长轴方向上具有倾斜端并与第一线单元隔开预定距离的第二线单元，以及绝缘插头 ，其插入在第一线路单元和第二线路单元之间，并且将第一线路单元与第二线路单元电绝缘。

    Method of forming fine patterns using silicon oxide layer
    8.
    发明授权
    Method of forming fine patterns using silicon oxide layer 有权
    使用氧化硅层形成精细图案的方法

    公开(公告)号：US06989231B2

    公开(公告)日：2006-01-24

    申请号：US10452413

    申请日：2003-06-03

    申请人： Jae-eun Park ,  Kang-soo Chu ,  Joo-won Lee ,  Jong-ho Yang

    发明人： Jae-eun Park ,  Kang-soo Chu ,  Joo-won Lee ,  Jong-ho Yang

    IPC分类号： G03C5/00

    CPC分类号： H01L21/32139 ,  G03F7/40 ,  G03F7/405 ,  H01L21/0274

    摘要： Provided is a method of forming a fine pattern, in which a silicon oxide layer is formed on a photoresist pattern and dry etching is performed on the resultant structure. According to the method, a photoresist pattern is formed on a material layer on which a fine pattern is to be formed, a silicon oxide layer is conformally deposited on the photoresist pattern without damaging the photoresist pattern, and dry etching is performed on a lower layer. During the dry etching, spacers are formed along the sidewalls of the photoresist pattern, and then, a polymer layer is formed on the photoresist pattern. Accordingly, it is possible to prevent the thinning of the photoresist pattern so that a desired pattern can be obtained, and further, to prevent striation or wiggling from occurring on the patterned material layer.

    摘要翻译： 提供一种形成精细图案的方法，其中在光致抗蚀剂图案上形成氧化硅层，并对所得结构进行干法蚀刻。 根据该方法，在要形成精细图案的材料层上形成光致抗蚀剂图案，在光致抗蚀剂图案上共形沉积氧化硅层而不损害光致抗蚀剂图案，并且在下层进行干法蚀刻 。 在干蚀刻期间，沿着光致抗蚀剂图案的侧壁形成间隔物，然后在光致抗蚀剂图案上形成聚合物层。 因此，可以防止光致抗蚀剂图案的变薄，使得可以获得期望的图案，并且进一步防止在图案化材料层上发生条纹或摆动。

    Semiconductor device having an etch stopper formed of a SiN layer by low temperature ALD and method of fabricating the same
    9.
    发明申请
    Semiconductor device having an etch stopper formed of a SiN layer by low temperature ALD and method of fabricating the same 审中-公开
    具有通过低温ALD由SiN层形成的蚀刻停止件的半导体器件及其制造方法

    公开(公告)号：US20050142781A1

    公开(公告)日：2005-06-30

    申请号：US11024579

    申请日：2004-12-29

    申请人： Kang-soo Chu ,  Joo-won Lee ,  Jae-eun Park ,  Jong-ho Yang

    发明人： Kang-soo Chu ,  Joo-won Lee ,  Jae-eun Park ,  Jong-ho Yang

    IPC分类号： H01L21/28 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/318 ,  H01L21/60 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/8242 ,  H01L27/088 ,  H01L27/108 ,  H01L21/336

    CPC分类号： H01L21/76897 ,  H01L21/31111 ,  H01L21/31116

    摘要： Provided are a semiconductor device having an etch stopper formed of a nitride film by low temperature atomic layer deposition which can prevent damage to a semiconductor substrate and a method for fabricating the semiconductor device. Damage to the semiconductor substrate under the etch stopper composed of a second nitride film can be prevented by forming a first nitride film using high temperature LPCVD on the semiconductor substrate, forming the etch stopper including the second nitride film by low temperature ALD on the first nitride film, and removing the second nitride film by dry etching, thus taking advantage of the different etch selectivities of the first nitride film and the second nitride film.

    摘要翻译： 提供一种半导体器件，其具有通过低温原子层沉积由氮化物膜形成的蚀刻停止物，其能够防止对半导体衬底的损坏以及制造半导体器件的方法。 通过在半导体衬底上形成使用高温LPCVD的第一氮化物膜，可以防止在由第二氮化物膜构成的蚀刻停止器下的半导体衬底的损伤，通过第一氮化物上的低温ALD形成包括第二氮化物膜的蚀刻停止层 膜，并通过干蚀刻去除第二氮化物膜，从而利用第一氮化物膜和第二氮化物膜的不同蚀刻选择性。

    Semiconductor device having an etch stopper formed of a sin layer by low temperature ALD and method of fabricating the same
    10.
    发明授权
    Semiconductor device having an etch stopper formed of a sin layer by low temperature ALD and method of fabricating the same 有权
    具有通过低温ALD由sin层形成的蚀刻停止件的半导体器件及其制造方法

    公开(公告)号：US06858533B2

    公开(公告)日：2005-02-22

    申请号：US10612028

    申请日：2003-07-02

    申请人： Kang-soo Chu ,  J o-won Lee ,  Jae-eun Park ,  Jong-ho Yang

    发明人： Kang-soo Chu ,  J o-won Lee ,  Jae-eun Park ,  Jong-ho Yang

    IPC分类号： H01L21/28 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/318 ,  H01L21/60 ,  H01L21/768 ,  H01L21/8234 ,  H01L21/8242 ,  H01L27/088 ,  H01L27/108 ,  H01L21/4763

    CPC分类号： H01L21/76897 ,  H01L21/31111 ,  H01L21/31116

    摘要： Provided are a semiconductor device having an etch stopper formed of a nitride film by low temperature atomic layer deposition which can prevent damage to a semiconductor substrate and a method for fabricating the semiconductor device. Damage to the semiconductor substrate under the etch stopper composed of a second nitride film can be prevented by forming a first nitride film using high temperature LPCVD on the semiconductor substrate, forming the etch stopper including the second nitride film by low temperature ALD on the first nitride film, and removing the second nitride film by dry etching, thus taking advantage of the different etch selectivities of the first nitride film and the second nitride film.

    摘要翻译： 提供一种半导体器件，其具有通过低温原子层沉积由氮化物膜形成的蚀刻停止物，其能够防止对半导体衬底的损坏以及制造半导体器件的方法。 通过在半导体衬底上形成使用高温LPCVD的第一氮化物膜，可以防止在由第二氮化物膜构成的蚀刻停止器下的半导体衬底的损伤，通过第一氮化物上的低温ALD形成包括第二氮化物膜的蚀刻停止层 膜，并通过干蚀刻去除第二氮化物膜，从而利用第一氮化物膜和第二氮化物膜的不同蚀刻选择性。