公开(公告)号：US08713233B2

公开(公告)日：2014-04-29

申请号：US13050405

申请日：2011-03-17

申请人： Joon-Woo Cho ,  Jong Ho Roh ,  Jae Geun Yun ,  Sung-Min Hong

发明人： Joon-Woo Cho ,  Jong Ho Roh ,  Jae Geun Yun ,  Sung-Min Hong

IPC分类号： G06F13/00

CPC分类号： G06F13/368 ,  G06F12/0607 ,  G06F13/4022

摘要： Provided are an interconnect, a bus system with interconnect, and bus system operating method. The bus system includes a master, slaves access by the master, and an interconnect. The interconnect connects the master with the slaves in response to selection bits identified in a master address provided by the master.

摘要翻译： 提供互连，具有互连的总线系统和总线系统操作方法。 总线系统包括主机，主机的从机访问和互连。 响应于由主机提供的主地址中标识的选择位，互连将主机与从机连接。

公开(公告)号：US08886861B2

公开(公告)日：2014-11-11

申请号：US13323162

申请日：2011-12-12

申请人： Woo Cheol Kwon ,  Jae Geun Yun ,  Sung-Min Hong

发明人： Woo Cheol Kwon ,  Jae Geun Yun ,  Sung-Min Hong

IPC分类号： G06F13/00 ,  G06F13/40 ,  G06F13/364

CPC分类号： G06F13/4022 ,  G06F13/364

摘要： A memory interleaving device includes a slave interface, a master interface, and a crossbar switch. The slave interface is connected with a master intellectual property through an on-chip network. The master interface is connected with a slave intellectual property. The crossbar switch connects the slave interface with the master interface. The memory interleaving device transmits requests from the master intellectual property to the slave intellectual property, receives data or responses respectively corresponding to the requests from the slave intellectual property, and transmits the data or responses to the master intellectual property in an order in which the requests are received.

摘要翻译： 存储器交错设备包括从接口，主接口和交叉开关。 从接口通过片上网络与主控知识产权相连接。 主接口与从属知识产权相连。 交叉开关将从接口与主接口相连。 存储器交错装置将从主知识产权的请求发送到从属知识产权，分别接收来自从属知识产权的请求的数据或响应，并以请求的顺序将数据或响应发送到主知识产权 被收到

公开(公告)号：US20120117286A1

公开(公告)日：2012-05-10

申请号：US13287339

申请日：2011-11-02

申请人： Jae-Geun Yun ,  Jun-Hyung Um ,  Hyun-Uk Jung ,  Sung-Min Hong ,  Jung-Sik Lee ,  Hyun-Joon Kang ,  Ling Ling Liao ,  Woo-Cheol Kwon

发明人： Jae-Geun Yun ,  Jun-Hyung Um ,  Hyun-Uk Jung ,  Sung-Min Hong ,  Jung-Sik Lee ,  Hyun-Joon Kang ,  Ling Ling Liao ,  Woo-Cheol Kwon

IPC分类号： G06F13/00

CPC分类号： G06F13/4027

摘要： An interface device includes a transaction management unit, a buffer unit and a selection circuit. The transaction management unit selectively splits a transaction of a master device into a first sub-transaction and at least one remaining sub-transaction based on a size of the transaction. The buffer unit stores the remaining sub-transaction. The selection circuit selects one of the first sub-transaction and an output of the buffer unit in response to a select control signal.

摘要翻译： 接口设备包括交易管理单元，缓冲单元和选择电路。 交易管理单元基于交易的大小有选择地将主设备的交易分成第一子交易和至少一个剩余的子交易。 缓冲单元存储剩余的子事务。 选择电路响应于选择控制信号选择第一子事务和缓冲器单元的输出之一。

公开(公告)号：US20120159037A1

公开(公告)日：2012-06-21

申请号：US13323162

申请日：2011-12-12

申请人： Woo Cheol KWON ,  Jae Geun Yun ,  Sung-Min Hong

发明人： Woo Cheol KWON ,  Jae Geun Yun ,  Sung-Min Hong

IPC分类号： G06F13/40

CPC分类号： G06F13/4022 ,  G06F13/364

摘要： A memory interleaving device includes a slave interface, a master interface, and a crossbar switch. The slave interface is connected with a master intellectual property through an on-chip network. The master interface is connected with a slave intellectual property. The crossbar switch connects the slave interface with the master interface. The memory interleaving device transmits requests from the master intellectual property to the slave intellectual property, receives data or responses respectively corresponding to the requests from the slave intellectual property, and transmits the data or responses to the master intellectual property in an order in which the requests are received.

摘要翻译： 存储器交错设备包括从接口，主接口和交叉开关。 从接口通过片上网络与主控知识产权相连接。 主接口与从属知识产权相连。 交叉开关将从接口与主接口相连。 存储器交错装置将从主知识产权的请求发送到从属知识产权，分别接收来自从属知识产权的请求的数据或响应，并以请求的顺序将数据或响应发送到主知识产权 被收到

公开(公告)号：US08730732B2

公开(公告)日：2014-05-20

申请号：US13340577

申请日：2011-12-29

申请人： Sung-Min Hong ,  Tae-Kyung Kim ,  Woosung Choi

发明人： Sung-Min Hong ,  Tae-Kyung Kim ,  Woosung Choi

IPC分类号： G11C16/06

CPC分类号： G11C16/0483 ,  H01L27/11529

摘要： A non-volatile semiconductor memory device comprises a semiconductor substrate and a plurality of gate structures formed on a cell region of the semiconductor substrate. The plurality of gate structures include: a first select-gate structure and a second select-gate structure disposed on the cell region, the first select-gate structure and the second select-gate structure spaced apart from each other, and a plurality of cell gate structures disposed between the first select-gate structure and the second select-gate structure. At least one of the select-gate structures comprises plural select gates.

摘要翻译： 非挥发性半导体存储器件包括半导体衬底和形成在半导体衬底的单元区域上的多个栅极结构。 多个栅极结构包括：设置在单元区域上的第一选择栅极结构和第二选择栅极结构，第一选择栅极结构和第二选择栅极结构彼此间隔开，以及多个单元 栅极结构设置在第一选择栅极结构和第二选择栅极结构之间。 选择栅极结构中的至少一个包括多个选择栅极。

公开(公告)号：US20130170302A1

公开(公告)日：2013-07-04

申请号：US13340577

申请日：2011-12-29

申请人： Sung-Min Hong ,  Tae-Kyung Kim ,  Woosung Choi

发明人： Sung-Min Hong ,  Tae-Kyung Kim ,  Woosung Choi

IPC分类号： G11C16/04 ,  H01L21/336

CPC分类号： G11C16/0483 ,  H01L27/11529

摘要： A non-volatile semiconductor memory device comprises a semiconductor substrate and a plurality of gate structures formed on a cell region of the semiconductor substrate. The plurality of gate structures include: a first select-gate structure and a second select-gate structure disposed on the cell region, the first select-gate structure and the second select-gate structure spaced apart from each other, and a plurality of cell gate structures disposed between the first select-gate structure and the second select-gate structure. At least one of the select-gate structures comprises plural select gates.

摘要翻译： 非挥发性半导体存储器件包括半导体衬底和形成在半导体衬底的单元区域上的多个栅极结构。 多个栅极结构包括：设置在单元区域上的第一选择栅极结构和第二选择栅极结构，第一选择栅极结构和第二选择栅极结构彼此间隔开，以及多个单元 栅极结构设置在第一选择栅极结构和第二选择栅极结构之间。 选择栅极结构中的至少一个包括多个选择栅极。

公开(公告)号：US20120131246A1

公开(公告)日：2012-05-24

申请号：US13276748

申请日：2011-10-19

申请人： Bub-chul Jeong ,  Jaegeun Yun ,  Junhyung Um ,  Jung-Sik Lee ,  Hyun-Joon Kang ,  Sung-Min Hong ,  Ling Ling Liao

发明人： Bub-chul Jeong ,  Jaegeun Yun ,  Junhyung Um ,  Jung-Sik Lee ,  Hyun-Joon Kang ,  Sung-Min Hong ,  Ling Ling Liao

IPC分类号： G06F13/00

CPC分类号： G06F13/4217 ,  G06F2213/0038

摘要： A system-on-a-chip semiconductor device comprises a first master device configured to issue a request having a transaction ID, a plurality of slave devices configured to provide data in response to the request, and an interconnector configured to include a slave interface for providing the request to one or more master interfaces and for supplying response data to the first master device based on operation characteristics of the first master.An arbitration method of an interconnector transferring a plurality of response data provided from a plurality of slave devices to a master device comprises selecting one of a plurality of arbitration modes based on operation characteristics of the master device; and transferring the response data in the order determined by transfer priority corresponding to the selected arbitration mode.

摘要翻译： 片上系统半导体器件包括被配置为发出具有事务ID的请求的第一主设备，被配置为响应于该请求而提供数据的多个从设备，以及互连器，被配置为包括从接口， 向所述主接口提供所述请求，并且基于所述第一主设备的操作特性向所述第一主设备提供响应数据。 将从多个从设备提供的多个响应数据传送到主设备的互连器的仲裁方法包括基于主设备的操作特性选择多个仲裁模式中的一个; 并以与所选仲裁模式对应的传送优先级确定的顺序传送响应数据。

公开(公告)号：US07334053B2

公开(公告)日：2008-02-19

申请号：US10840101

申请日：2004-05-06

申请人： Sung-Min Hong

发明人： Sung-Min Hong

IPC分类号： G06F13/10

CPC分类号： G06F13/385

摘要： A method and system for detecting a state of a disc drive. A cable select signal is input from a host and is gated to determine the state of the disc drive when a jumper is set to indicate that the disc drive is in a cable select state or when the jumper is missing. The cable select signal is prevented from determining the state of the disc drive when the jumper is present and is set to indicate that the disc drive is in the master state or the slave state. Additionally, the cable select signal dictates the state of the disc drive when the jumper is present and is set to indicate that the disc drive is in the cable select state.

摘要翻译： 一种用于检测盘驱动器的状态的方法和系统。 从主机输入电缆选择信号，并且当跳线设置为指示磁盘驱动器处于电缆选择状态或跳线丢失时，选通磁盘驱动器的状态。 当跳线存在时，防止电缆选择信号确定磁盘驱动器的状态，并将其设置为指示磁盘驱动器处于主状态或从属状态。 此外，当跳线存在时，电缆选择信号指示磁盘驱动器的状态，并被设置为指示磁盘驱动器处于电缆选择状态。

公开(公告)号：US20150039795A1

公开(公告)日：2015-02-05

申请号：US14320993

申请日：2014-07-01

申请人： Jae-Young Hur ,  Hyun-Joon Kang ,  Sung-Min Hong

发明人： Jae-Young Hur ,  Hyun-Joon Kang ,  Sung-Min Hong

IPC分类号： G06F9/46 ,  G06F13/16 ,  G06F13/12

CPC分类号： G06F13/1621 ,  G06F13/4022 ,  G06F13/4059

摘要： Provided is a method of driving a system-on-chip (SOC). The method includes adding a first transaction to a list, allocating the first transaction to a first slot, determining whether a second transaction is redundant, and adding the second transaction to the list and allocating the second transaction to the first slot when it is determined that the second transaction is redundant. Accordingly, the SOC can increase outstanding capability and enhance performance of a system interconnection.

摘要翻译： 提供了一种驱动片上系统（SOC）的方法。 该方法包括将第一事务添加到列表中，将第一事务分配到第一时隙，确定第二事务是否是冗余的，以及将第二事务添加到列表中，并且当确定第二事务被确定为第一事务时，将第二事务分配给第一时隙 第二个事务是多余的。 因此，SOC可以提高突出的能力并提高系统互连的性能。

公开(公告)号：US08819322B2

公开(公告)日：2014-08-26

申请号：US13396155

申请日：2012-02-14

申请人： Jaegeun Yun ,  Sung-Min Hong ,  Bub-chul Jeong

发明人： Jaegeun Yun ,  Sung-Min Hong ,  Bub-chul Jeong

IPC分类号： G06F13/14

CPC分类号： G06F13/1657

摘要： A system on chip includes a plurality of master devices, a plurality of slave devices that supply data in response to requests of the plurality of master devices and pointer update logic configured to process the requests from the plurality of master devices sequentially in a pipeline manner.

摘要翻译： 片上系统包括多个主设备，响应于多个主设备的请求提供数据的多个从设备和配置成以流水线方式顺次处理来自多个主设备的请求的指针更新逻辑。