利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

49 条记录 (耗时 0.023 秒)

    Power system inhibit method and device and structure therefor
    1.
    发明授权
    Power system inhibit method and device and structure therefor 有权
    电力系统抑制方法及其装置及结构

    公开(公告)号：US07227203B2

    公开(公告)日：2007-06-05

    申请号：US11146772

    申请日：2005-06-08

    申请人： Josef Halamik ,  Jefferson W. Hall

    发明人： Josef Halamik ,  Jefferson W. Hall

    IPC分类号： H01L29/80

    CPC分类号： H01L21/823418 ,  H01L27/0203 ,  H01L27/0285 ,  H01L27/088 ,  H01L27/098 ,  H03K17/082

    摘要： A power control system (25) uses two separate currents to control a startup operation of the power control system (25). The two currents are shunted to ground to inhibit operation of the power control system (25) and one of the two currents is disabled to minimize power dissipation. The two independently controlled currents are generated by a multiple output current high voltage device (12) responsively to two separate control signals (23,24).

    摘要翻译： 电力控制系统（25）使用两个单独的电流来控制功率控制系统（25）的启动操作。 两个电流被分流到地，以禁止功率控制系统（25）的操作，并且禁用两个电流中的一个以最小化功率耗散。 两个独立控制的电流由多输出电流高压装置（12）响应于两个分离的控制信号（23,24）产生。

    ONE-TIME PROGRAMMABLE MEMORY, INTEGRATED CIRCUIT INCLUDING SAME, AND METHOD THEREFOR
    2.
    发明申请
    ONE-TIME PROGRAMMABLE MEMORY, INTEGRATED CIRCUIT INCLUDING SAME, AND METHOD THEREFOR 有权
    一次性可编程存储器，包括它们的集成电路及其方法

    公开(公告)号：US20130286710A1

    公开(公告)日：2013-10-31

    申请号：US13455723

    申请日：2012-04-25

    申请人： Jefferson W. Hall ,  Josef Halamik ,  Pavel Londak

    发明人： Jefferson W. Hall ,  Josef Halamik ,  Pavel Londak

    IPC分类号： G11C17/00

    CPC分类号： G11C17/16 ,  G11C17/18

    摘要： A one-time programmable memory includes a first one-time programmable memory cell including a fuse core having an input terminal for receiving a trim signal, an output terminal for providing a sense signal, and a fuse. The fuse core conducts current through the fuse in response to the trim signal. The one-time programmable memory cell also includes a sense circuit having an input terminal coupled to the output terminal of the fuse core, and an output terminal for providing a termination signal, and a logic circuit having a first input terminal for receiving a program enable signal, a second input terminal for receiving a data signal, a third input terminal coupled to the output terminal of the sense circuit for receiving the termination signal, and an output terminal coupled to the input terminal of the fuse core for providing the trim signal.

    摘要翻译： 一次性可编程存储器包括第一一次可编程存储器单元，其包括具有用于接收修整信号的输入端的熔丝芯，用于提供感测信号的输出端和熔丝。 保险丝芯响应于微调信号导通电流通过保险丝。 一次性可编程存储单元还包括感测电路，其具有耦合到保险丝芯的输出端的输入端和用于提供终止信号的输出端，以及具有用于接收程序使能的第一输入端的逻辑电路 信号，用于接收数据信号的第二输入端，耦合到读出电路的输出端用于接收终止信号的第三输入端，以及耦合到保险丝芯的输入端用于提供微调信号的输出端。

    Method and apparatus for providing integrated low power self-supply in switched mode power supplies
    4.
    发明授权
    Method and apparatus for providing integrated low power self-supply in switched mode power supplies 有权
    用于在开关模式电源中提供集成的低功率自供电的方法和装置

    公开(公告)号：US06587357B1

    公开(公告)日：2003-07-01

    申请号：US09707800

    申请日：2000-11-08

    申请人： Josef Halamik ,  Jefferson W. Hall

    发明人： Josef Halamik ,  Jefferson W. Hall

    IPC分类号： H02M3335

    CPC分类号： H02M3/33507 ,  H02M2001/0006

    摘要： A regulated self-supply power controller for a switched-mode power supply includes an operational voltage supply line having a voltage magnitude that varies between two voltage magnitudes. A controllable power source is intermittently coupled to a capacitor, which is coupled to the operational voltage supply line, on the basis of the variation of the operational voltage supply line voltage magnitude between the two voltage magnitudes.

    摘要翻译： 用于开关型电源的稳定的自供电功率控制器包括具有在两个电压幅度之间变化的电压幅度的工作电压供应线。 可控电源基于两个电压幅度之间的工作电压电源电压幅度的变化而间歇地耦合到耦合到工作电压供应线的电容器。

    One-time programmable memory, integrated circuit including same, and method therefor
    5.
    发明授权
    One-time programmable memory, integrated circuit including same, and method therefor 有权
    一次可编程存储器，包括其的集成电路及其方法

    公开(公告)号：US08964444B2

    公开(公告)日：2015-02-24

    申请号：US13455723

    申请日：2012-04-25

    申请人： Jefferson W. Hall ,  Josef Halamik ,  Pavel Londak

    发明人： Jefferson W. Hall ,  Josef Halamik ,  Pavel Londak

    IPC分类号： G11C17/18

    CPC分类号： G11C17/16 ,  G11C17/18

    摘要： A one-time programmable memory includes a first one-time programmable memory cell including a fuse core having an input terminal for receiving a trim signal, an output terminal for providing a sense signal, and a fuse. The fuse core conducts current through the fuse in response to the trim signal. The one-time programmable memory cell also includes a sense circuit having an input terminal coupled to the output terminal of the fuse core, and an output terminal for providing a termination signal, and a logic circuit having a first input terminal for receiving a program enable signal, a second input terminal for receiving a data signal, a third input terminal coupled to the output terminal of the sense circuit for receiving the termination signal, and an output terminal coupled to the input terminal of the fuse core for providing the trim signal.

    摘要翻译： 一次性可编程存储器包括第一一次可编程存储器单元，其包括具有用于接收修整信号的输入端的熔丝芯，用于提供感测信号的输出端和熔丝。 保险丝芯响应于微调信号导通电流通过保险丝。 一次性可编程存储单元还包括感测电路，其具有耦合到保险丝芯的输出端的输入端和用于提供终止信号的输出端，以及具有用于接收程序使能的第一输入端的逻辑电路 信号，用于接收数据信号的第二输入端，耦合到读出电路的输出端用于接收终止信号的第三输入端，以及耦合到保险丝芯的输入端用于提供微调信号的输出端。

    Power system inhibit method and device and structure therefor
    7.
    发明授权
    Power system inhibit method and device and structure therefor 有权
    电力系统抑制方法及其装置及结构

    公开(公告)号：US07826238B2

    公开(公告)日：2010-11-02

    申请号：US11735893

    申请日：2007-04-16

    申请人： Josef Halamik ,  Jefferson W. Hall

    发明人： Josef Halamik ,  Jefferson W. Hall

    IPC分类号： H02M1/00 ,  H02M3/07

    CPC分类号： H01L21/823418 ,  H01L27/0203 ,  H01L27/0285 ,  H01L27/088 ,  H01L27/098 ,  H03K17/082

    摘要： A power control system (25) uses two separate currents to control a startup operation of the power control system (25). The two currents are shunted to ground to inhibit operation of the power control system (25) and one of the two currents is disabled to minimize power dissipation. The two independently controlled currents are generated by a multiple output current high voltage device (12) responsively to two separate control signals (23,24).

    摘要翻译： 电力控制系统（25）使用两个单独的电流来控制功率控制系统（25）的启动操作。 两个电流被分流到地，以禁止功率控制系统（25）的操作，并且禁用两个电流中的一个以最小化功率耗散。 两个独立控制的电流由多输出电流高压装置（12）响应于两个分离的控制信号（23,24）产生。

    Oscillator controller with first and second voltage reference
    8.
    发明授权
    Oscillator controller with first and second voltage reference 有权
    具有第一和第二参考电压的振荡器控制器

    公开(公告)号：US06271735B1

    公开(公告)日：2001-08-07

    申请号：US09455416

    申请日：1999-12-06

    申请人： Josef Halamik ,  Frantisek Sukup ,  Jefferson W. Hall

    发明人： Josef Halamik ,  Frantisek Sukup ,  Jefferson W. Hall

    IPC分类号： H03B520

    CPC分类号： H03K4/06 ,  H03K3/0231 ,  H03L1/02

    摘要： A controller oscillator provides a periodic output signal having first and second output level states. The oscillator is responsive to an applied saw tooth signal that varies between first and second voltages (Vlow,Vhigh). The oscillator is comprised of a comparator (82) the non-inverting input of which receives the saw tooth signal applied thereto to produce the periodic output signal at its output (86). A first voltage reference circuit (88, 90, and 92) generates the second voltage (Vhigh) that is applied to the inverting input of the comparator while the periodic output signal is at the first output level state and the input signal charges from the first voltage (Vlow) towards the second voltage. As the input signal becomes equal to the second voltage the output of the comparator switches to the second output level state and a second voltage reference (92,94, 96) provides the first voltage at the inverting input of the comparator.

    摘要翻译： 控制器振荡器提供具有第一和第二输出电平状态的周期性输出信号。 振荡器响应于在第一和第二电压（Vlow，Vhigh）之间变化的施加的锯齿信号。 振荡器由比较器（82）组成，其同相输入端接收施加到其上的锯齿信号，以在其输出（86）产生周期性输出信号。 第一电压参考电路（88,90和92）产生施加到比较器的反相输入的第二电压（Vhigh），同时周期性输出信号处于第一输出电平状态，并且输入信号从第一电压 电压（Vlow）朝向第二电压。 当输入信号变得等于第二电压时，比较器的输出切换到第二输出电平状态，第二电压基准（92,94,96）在比较器的反相输入端提供第一电压。

    Resonant controller circuit and system with reduced peak currents during soft-start
    9.
    发明授权
    Resonant controller circuit and system with reduced peak currents during soft-start 有权
    软启动时谐振控制器电路和峰值电流降低的系统

    公开(公告)号：US08804382B2

    公开(公告)日：2014-08-12

    申请号：US12954086

    申请日：2010-11-24

    申请人： John D. Stone ,  Jefferson W. Hall

    发明人： John D. Stone ,  Jefferson W. Hall

    IPC分类号： H02M1/088 ,  H02M1/36 ,  H02M3/158 ,  H02M1/096

    CPC分类号： H02M3/1588 ,  H02M1/36 ,  Y02B70/1425 ,  Y02B70/1466

    摘要： A circuit includes a first control output adapted to couple to a control terminal of a first transistor and a second control output adapted to couple to a control terminal of a second transistor. The circuit further includes a feedback input for receiving a signal and a control circuit. The control circuit is configured to independently control first and second on-times of control signals applied to the first and second control outputs, respectively, in response to receiving the signal to limit a current at an output node.

    摘要翻译： 电路包括适于耦合到第一晶体管的控制端的第一控制输出和适于耦合到第二晶体管的控制端的第二控制输出。 电路还包括用于接收信号的反馈输入和控制电路。 控制电路被配置为响应于接收到信号以限制输出节点处的电流，分别独立地控制施加到第一和第二控制输出的控制信号的第一和第二接通时间。