Boosted clock circuit for semiconductor memory
    1.
    发明授权
    Boosted clock circuit for semiconductor memory 有权
    用于半导体存储器的升压时钟电路

    公开(公告)号:US07376042B2

    公开(公告)日:2008-05-20

    申请号:US11492636

    申请日:2006-07-25

    IPC分类号: G11C8/00 G11C5/14 G11C7/00

    CPC分类号: G11C7/1072 G11C7/222

    摘要: A memory component includes at least one memory bank array, a DQ region, a clock tree, and a voltage generator. The memory component is configured in a semiconductor wafer. The at least one memory bank array is configured such that data is read out of it during a read operation. The clock tree is coupled to the DQ region and is configured for driving data during the read operation. The voltage generator is coupled to at least some components of the clock tree in order to provide at least some of the components of the clock tree with an increased voltage.

    摘要翻译: 存储器组件包括至少一个存储体阵列,DQ区,时钟树和电压发生器。 存储器部件配置在半导体晶片中。 至少一个存储体阵列被配置为使得在读取操作期间从其读出数据。 时钟树耦合到DQ区,并且被配置为在读取操作期间驱动数据。 电压发生器耦合到时钟树的至少一些组件,以便提供时钟树的至少一些组件具有增加的电压。

    Boosted clock circuit for semiconductor memory

    公开(公告)号:US20080031057A1

    公开(公告)日:2008-02-07

    申请号:US11492636

    申请日:2006-07-25

    IPC分类号: G11C5/14

    CPC分类号: G11C7/1072 G11C7/222

    摘要: A memory component includes at least one memory bank array, a DQ region, a clock tree, and a voltage generator. The memory component is configured in a semiconductor wafer. The at least one memory bank array is configured such that data is read out of it during a read operation. The clock tree is coupled to the DQ region and is configured for driving data during the read operation. The voltage generator is coupled to at least some components of the clock tree in order to provide at least some of the components of the clock tree with an increased voltage.

    Voltage supply circuit, in particular for a DRAM memory circuit, as well as a method for controlling a supply source
    3.
    发明授权
    Voltage supply circuit, in particular for a DRAM memory circuit, as well as a method for controlling a supply source 有权
    电压供应电路,特别是用于DRAM存储器电路,以及用于控制供应源的方法

    公开(公告)号:US07379373B2

    公开(公告)日:2008-05-27

    申请号:US11295160

    申请日:2005-12-05

    IPC分类号: G11C5/14

    CPC分类号: G11C11/4074 G11C5/14

    摘要: A voltage supply circuit for providing an internal supply voltage in an integrated circuit is provided. The voltage supply circuit comprises a supply source for setting the internal supply voltage on a supply voltage line and a control circuit which is connected to the supply source for switching on and off the supply source. The control circuit can itself be switched off and regularly switched on again, wherein the control circuit includes a control unit in order to switch the supply source on and off in such a way that the internal supply voltage on the supply voltage line differs essentially by no more than a limit value as a result of capacitive charge storage.

    摘要翻译: 提供了一种用于在集成电路中提供内部电源电压的电压供应电路。 电压供给电路包括用于设定电源电压线上的内部电源电压的供给源和与供给源连接的用于接通和关闭供给源的控制电路。 控制电路本身可以被断开并再次定期接通,其中控制电路包括一个控制单元,以便以这样的方式切换供电源,使得电源电压线上的内部电源电压基本上不变 作为电容性电荷存储的结果,超过限制值。

    Random access memory having voltage provided out of boosted supply voltage
    4.
    发明授权
    Random access memory having voltage provided out of boosted supply voltage 有权
    随机存取存储器具有由升压的电源电压提供的电压

    公开(公告)号:US07196947B2

    公开(公告)日:2007-03-27

    申请号:US11153969

    申请日:2005-06-16

    申请人: Helmut Seitz

    发明人: Helmut Seitz

    IPC分类号: G11C7/00

    摘要: A random access memory including an array of single transistor memory cells and a voltage source. The voltage source is configured to receive a boosted supply voltage and a reference voltage. The voltage source is configured to provide an output voltage out of the boosted supply voltage and based on the reference voltage.

    摘要翻译: 一种包括单晶体管存储单元阵列和电压源的随机存取存储器。 电压源被配置为接收升压的电源电压和参考电压。 电压源被配置为提供超出升压电源电压的输出电压并且基于参考电压。

    Method and apparatus for an oscillator within a memory device
    5.
    发明申请
    Method and apparatus for an oscillator within a memory device 有权
    用于存储器件内的振荡器的方法和装置

    公开(公告)号:US20070189095A1

    公开(公告)日:2007-08-16

    申请号:US11354985

    申请日:2006-02-16

    IPC分类号: G11C7/00

    摘要: An apparatus for controlling generation of pulses for refresh operations of a memory device having a pad to transfer information and to receive signals from an external interface. The apparatus includes a switch, coupled to a current source and to the pad receiving signals from the external interface. The switch outputs one of the signals from the current source or the pad in response to a switch control signal. An oscillator is coupled to the switch and generates the refresh operation pulses in response to the output from the switch.

    摘要翻译: 一种用于控制用于具有用于传送信息并从外部接口接收信号的垫的存储器件的刷新操作的脉冲的产生的装置。 该装置包括耦合到电流源的开关和从外部接口接收信号的焊盘。 响应于开关控制信号,开关输出来自电流源或焊盘的信号之一。 振荡器耦合到开关并且响应于来自开关的输出而产生刷新操作脉冲。

    Random access memory having voltage provided out of boosted supply voltage
    6.
    发明申请
    Random access memory having voltage provided out of boosted supply voltage 有权
    随机存取存储器具有由升压的电源电压提供的电压

    公开(公告)号:US20060233029A1

    公开(公告)日:2006-10-19

    申请号:US11153969

    申请日:2005-06-16

    申请人: Helmut Seitz

    发明人: Helmut Seitz

    IPC分类号: G11C7/00

    摘要: A random access memory including an array of single transistor memory cells and a voltage source. The voltage source is configured to receive a boosted supply voltage and a reference voltage. The voltage source is configured to provide an output voltage out of the boosted supply voltage and based on the reference voltage.

    摘要翻译: 包括单晶体管存储单元阵列和电压源的随机存取存储器。 电压源被配置为接收升压的电源电压和参考电压。 电压源被配置为提供超出升压电源电压的输出电压并且基于参考电压。

    Methods and apparatus for implementing standby mode in a random access memory
    7.
    发明申请
    Methods and apparatus for implementing standby mode in a random access memory 有权
    在随机存取存储器中实现待机模式的方法和装置

    公开(公告)号:US20060245287A1

    公开(公告)日:2006-11-02

    申请号:US11116456

    申请日:2005-04-28

    IPC分类号: G11C7/00

    摘要: A memory device includes: a generator system having a number of generators that supply voltage or current to the memory device, a controller that supplies to the generator system a state control signal that commands the generators to be in an active state or a standby state, and a self-refresh oscillator that generates a self-refresh clock signal having a period suitable to refresh memory cells of the memory device. The controller uses the self-refresh clock signal to delay transitions of the state control signal from the active state to the standby state relative to corresponding state changes of at least one external signal received by the memory device.

    摘要翻译: 存储装置包括:发电机系统,其具有向存储装置提供电压或电流的多个发生器;向发电机系统提供命令发电机处于活动状态或待机状态的状态控制信号的控制器, 以及自刷新振荡器,其生成具有适于刷新存储器件的存储单元的周期的自刷新时钟信号。 控制器使用自刷新时钟信号来相对于由存储器件接收的至少一个外部信号的相应状态变化来延迟状态控制信号从激活状态到待机状态的转变。

    Internal combustion engine balance shaft bearing arrangement at the
crankcase
    8.
    发明授权
    Internal combustion engine balance shaft bearing arrangement at the crankcase 失效
    内燃机平衡轴轴承布置在曲轴箱

    公开(公告)号:US4508069A

    公开(公告)日:1985-04-02

    申请号:US598008

    申请日:1984-04-09

    摘要: A bearing arrangement for the balance shafts for balancing second order inertia forces on an internal combustion engine, in which the balance shafts run parallel to the crankshaft on both longitudinal walls of the crankcase, and have the ends carrying the balance weights supported by means of journal bearings within the crankcase and having driven ends supported by means of roller bearings outside the crankcase in the region of a crankcase end wall.

    摘要翻译: 用于平衡轴的平衡轴用于平衡内燃机上的二阶惯性力的轴承装置,其中平衡轴在曲轴箱的两个纵向壁上平行于曲轴行进,并且具有通过轴颈支撑的平衡重的端部 在曲轴箱内具有轴承,并且具有在曲轴箱端壁区域内由曲轴箱外部的滚子轴承支撑的从动端。

    Memory having power-up circuit
    9.
    发明授权
    Memory having power-up circuit 有权
    存储器具有上电电路

    公开(公告)号:US07187612B2

    公开(公告)日:2007-03-06

    申请号:US11118037

    申请日:2005-04-29

    申请人: Helmut Seitz

    发明人: Helmut Seitz

    IPC分类号: G11C5/14

    摘要: A memory includes a power-up circuit configured to increase a first voltage to a first value with a second voltage tied to ground, reduce the first voltage from the first value to a second value with the second voltage floating to reduce the second voltage through a parasitic coupling capacitance, and pump the second voltage to reduce the second voltage to a third value with the first voltage less than the second value.

    摘要翻译: 存储器包括上电电路,其被配置为将第一电压以第二电压连接到地将第一电压增加到第一电压,将第一电压从第一值减小到第二值,同时第二电压浮置以通过一第 寄生耦合电容,并且泵浦第二电压以将第二电压降低到第三值,第一电压小于第二值。

    Reference circuit that provides a temperature dependent voltage
    10.
    发明申请
    Reference circuit that provides a temperature dependent voltage 审中-公开
    提供温度相关电压的参考电路

    公开(公告)号:US20060232326A1

    公开(公告)日:2006-10-19

    申请号:US11108186

    申请日:2005-04-18

    IPC分类号: G05F1/10

    摘要: A reference circuit that includes a first circuit configured to provide a temperature dependent current, a second circuit configured to provide a first current, and a third circuit. The third circuit is configured to provide a temperature dependent voltage based on the first current and the temperature dependent current. The temperature dependent voltage has a voltage versus temperature slope established by the third circuit and a voltage level established by the first current.

    摘要翻译: 一种参考电路,包括被配置为提供与温度相关的电流的第一电路,被配置为提供第一电流的第二电路和第三电路。 第三电路被配置为基于第一电流和与温度相关的电流来提供与温度相关的电压。 温度依赖电压具有由第三电路建立的电压对温度斜率和由第一电流建立的电压电平。