公开(公告)号：US5932924A

公开(公告)日：1999-08-03

申请号：US16988

申请日：1998-02-02

申请人： Joseph B. Diana ,  Victor Manuel Torres

发明人： Joseph B. Diana ,  Victor Manuel Torres

IPC分类号： H01L23/495

CPC分类号： H01L23/49503 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L24/48 ,  H01L24/49 ,  H01L2924/00014 ,  H01L2924/181

摘要： A leadframe (100) has a flag having an outer contour that tapers from first and second opposing ends (160, 162) to a common point, the midline (200) of the flag. The tapering of the leadframe is continuous, extending from points adjacent the first and second ends or from the ends themselves, to the common midline. According to this structure, a wide range of die sizes may be accommodated with a single leadframe, while simultaneously preventing popcorning of the packaged semiconductor device (300) incorporating the leadframe.

摘要翻译： 引线框架（100）具有标记，该标记具有从第一和第二相对端（160,162）逐渐变细到标志的中线（200）的公共点的外轮廓。 引线框的锥形是连续的，从邻近第一端和第二端的点或从端部本身延伸到公共中线。 根据该结构，可以利用单个引线框架适应范围广泛的管芯尺寸，同时防止包含引线框架的封装半导体器件（300）的爆裂。

公开(公告)号：US5898213A

公开(公告)日：1999-04-27

申请号：US888392

申请日：1997-07-07

申请人： Victor Manuel Torres ,  Laxminarayan Sharma ,  Ashok Srikantappa

发明人： Victor Manuel Torres ,  Laxminarayan Sharma ,  Ashok Srikantappa

IPC分类号： H01L23/12 ,  H01L21/60 ,  H01L23/498 ,  H01L23/495

CPC分类号： H01L24/06 ,  H01L23/49838 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/49433 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/181

摘要： A bond post configuration for wire bonded semiconductors has bond posts grouped in three posts where two are arranged closely to a side of a die about a first axis and a third is arranged in between and further removed from the side about a second axis. In one form, the bond post configuration is a radial configuration. Additionally, conductive traces which extend from the bond posts and away from the die are placed off-center from the the bond posts about the first axis to provide more placement area for the bond posts arranged about the second axis. The bond post configuration may be utilized in any wire bonded semiconductor.

摘要翻译： 用于引线键合半导体的接合柱结构具有分组在三个柱中的结合柱，其中两个柱相对于围绕第一轴线的模具的侧面紧密地布置，并且第三布置在第二轴线之间并且从第二轴线侧进一步移除。 在一种形式中，接合柱构型是径向构型。 此外，从接合柱延伸并远离模具的导电迹线从关于第一轴线的接合柱偏离中心放置，以为围绕第二轴线布置的接合柱提供更多的放置区域。 接合柱结构可用于任何导线键合半导体。

公开(公告)号：US5962926A

公开(公告)日：1999-10-05

申请号：US940605

申请日：1997-09-30

申请人： Victor Manuel Torres ,  Ashok Srikantappa ,  Laxminarayan Sharma

发明人： Victor Manuel Torres ,  Ashok Srikantappa ,  Laxminarayan Sharma

IPC分类号： H01L21/60 ,  H01L23/485 ,  H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/06 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/05599 ,  H01L2224/48245 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/49175 ,  H01L2224/4943 ,  H01L2224/49431 ,  H01L2924/00014 ,  H01L2924/01004 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01082

摘要： The present invention comprises a semiconductor device (20) having a active circuit (22) and a bond pad area (24). Within the bond pad area there are a plurality of rows of bond pads. Sets of bond pads (30-36) include one bond pad from each row. The bond pads (26) are uniquely positioned within the bond pad area (24) to allow for a first wire pitch between pads which are adjacent and in the same set, and a second wire pitch between pads which are adjacent and in different sets. A method of determining placement of the bond pads (26) is taught.

摘要翻译： 本发明包括具有有源电路（22）和接合焊盘区（24）的半导体器件（20）。 在焊盘区域内有多排接合焊盘。 一组接合垫（30-36）包括每排一个接合垫。 接合焊盘（26）独特地定位在接合焊盘区域（24）内，以允许在相邻和相同组中的焊盘之间的第一线间距以及在相邻且不同组中的焊盘之间的第二线间距。 教导了确定接合焊盘（26）的放置的方法。