公开(公告)号：US08638088B2

公开(公告)日：2014-01-28

申请号：US13019490

申请日：2011-02-02

申请人： Jun Honda ,  Jong-Deog Jeong

发明人： Jun Honda ,  Jong-Deog Jeong

IPC分类号： G01R25/00

CPC分类号： H03F3/217 ,  H02M3/1588 ,  H02M2001/0009 ,  Y02B70/1466

摘要： In one embodiment, a method for detecting a load in a switched-mode power converter is provided. The switched-mode power converter includes high and low-side power switches which are configured to be driven respectively by high and low-side drive signals to provide a switching voltage. The high and low-side drive signals include a plurality of dead-time periods. The method includes monitoring a waveform of the switching voltage and at least one of the high and low-side drive signals. The monitored waveform of the switching voltage is compared to the monitored waveform of the at least one of the high and low-side drive signals to determine whether the switching voltage is high or low during at least one of the dead-time periods. A current measurement of the load is determined based on whether the switching voltage is high or low during the at least one of the dead-time periods.

摘要翻译： 在一个实施例中，提供了用于检测开关模式功率转换器中的负载的方法。 开关式功率转换器包括被分别由高侧和低侧驱动信号驱动以提供开关电压的高侧和低侧功率开关。 高低侧驱动信号包括多个死区时间。 该方法包括监视开关电压的波形和高侧和低侧驱动信号中的至少一个。 将开关电压的监视波形与高侧和低侧驱动信号中的至少一个驱动信号的监视波形进行比较，以在至少一个死区时间段内确定开关电压是高电平还是低电平。 基于在至少一个死区时间段期间开关电压是高还是低来确定负载的当前测量。

公开(公告)号：US07012452B2

公开(公告)日：2006-03-14

申请号：US10920114

申请日：2004-08-17

申请人： Jun Honda ,  Jong-Deog Jeong

发明人： Jun Honda ,  Jong-Deog Jeong

IPC分类号： H03B1/00

CPC分类号： H03F3/21

摘要： An integrated high-voltage linear amplifier IC with reduced power dissipation, faster operation, and small die size, comprising a low side well and a floating high side well; an error amplifier for receiving a noise signal; a level shifting circuit in the low side well for outputting a current mode error signal based on the noise signal to the high side well in differential current mode for noise reduction; and a drive circuit in the high side well. A voltage/current converter receives a voltage mode error signal based on the noise signal and supplies the current input signal. Current mirror circuitry and the drive circuit in the high side well outputs a sum current derived from the current mode error signal for driving external power devices.

摘要翻译： 集成的高压线性放大器IC，功耗降低，运行更快，管芯尺寸小，包括一个低侧井和一个浮动的高侧井; 用于接收噪声信号的误差放大器; 在低侧阱中的电平移动电路，用于在用于降噪的差分电流模式中将基于噪声信号的电流模式误差信号输出到高侧阱; 和高压侧的驱动电路。 电压/电流转换器基于噪声信号接收电压模式误差信号并提供电流输入信号。 电流镜电路和高侧阱中的驱动电路输出由电流模式误差信号导出的和电流，用于驱动外部功率器件。

公开(公告)号：US20070139109A1

公开(公告)日：2007-06-21

申请号：US11612933

申请日：2006-12-19

申请人： Jun Honda ,  Jong-Deog Jeong

发明人： Jun Honda ,  Jong-Deog Jeong

IPC分类号： H03F3/217

CPC分类号： H03F1/305 ,  H03F3/2171 ,  H03F2200/03 ,  H03F2200/78

摘要： A circuit for minimizing audible click noise upon the startup of a Class D audio power amplifier. The amplifier including a power switching output stage and a driver for driving the output stage receiving a driving signal and a shutdown signal, the shutdown signal preventing switching of the output stage. The circuit including a comparator connected to the driver for generating the driving signal; an error amplifier receiving an audio input signal; a first feedback loop for connecting the output stage as input to an input of the error amplifier, an output of the error amplifier being connected to an output of the comparator; and a circuit coupled to the error amplifier preventing a capacitor connected to the error amplifier from excessively charging, thereby preventing noise in the output stage when the shutdown signal is removed.

摘要翻译： 一种用于在D类音频功率放大器启动时最小化噪音的电路。 放大器包括功率开关输出级和用于驱动输出级接收驱动信号和关断信号的驱动器，该关断信号防止输出级的切换。 该电路包括连接到驱动器的比较器，用于产生驱动信号; 接收音频输入信号的误差放大器; 用于将输出级作为输入连接到误差放大器的输入的第一反馈回路，误差放大器的输出端连接到比较器的输出; 以及耦合到误差放大器的电路，防止连接到误差放大器的电容器过度充电，从而防止在关闭信号被去除时在输出级中的噪声。

公开(公告)号：US20120194170A1

公开(公告)日：2012-08-02

申请号：US13019490

申请日：2011-02-02

申请人： Jun Honda ,  Jong-Deog Jeong

发明人： Jun Honda ,  Jong-Deog Jeong

IPC分类号： G01R25/00

CPC分类号： H03F3/217 ,  H02M3/1588 ,  H02M2001/0009 ,  Y02B70/1466

摘要： In one embodiment, a method for detecting a load in a switched-mode power converter is provided. The switched-mode power converter includes high and low-side power switches which are configured to be driven respectively by high and low-side drive signals to provide a switching voltage. The high and low-side drive signals include a plurality of dead-time periods. The method includes monitoring a waveform of the switching voltage and at least one of the high and low-side drive signals. The monitored waveform of the switching voltage is compared to the monitored waveform of the at least one of the high and low-side drive signals to determine whether the switching voltage is high or low during at least one of the dead-time periods. A current measurement of the load is determined based on whether the switching voltage is high or low during the at least one of the dead-time periods.

摘要翻译： 在一个实施例中，提供了用于检测开关模式功率转换器中的负载的方法。 开关式功率转换器包括被分别由高侧和低侧驱动信号驱动以提供开关电压的高侧和低侧功率开关。 高低侧驱动信号包括多个死区时间。 该方法包括监视开关电压的波形和高侧和低侧驱动信号中的至少一个。 将开关电压的监视波形与高侧和低侧驱动信号中的至少一个驱动信号的监视波形进行比较，以在至少一个死区时间段内确定开关电压是高电平还是低电平。 基于在至少一个死区时间段期间开关电压是高还是低来确定负载的当前测量。

公开(公告)号：US20050077928A1

公开(公告)日：2005-04-14

申请号：US10920114

申请日：2004-08-17

申请人： Jun Honda ,  Jong-Deog Jeong

发明人： Jun Honda ,  Jong-Deog Jeong

IPC分类号： G03B1/00 ,  H03B1/00 ,  H03F20060101

CPC分类号： H03F3/21

摘要： An integrated high-voltage linear amplifier IC with reduced power dissipation, faster operation, and small die size, comprising a low side well and a floating high side well; an error amplifier for receiving a noise signal; a level shifting circuit in the low side well for outputting a current mode error signal based on the noise signal to the high side well in differential current mode for noise reduction; and a drive circuit in the high side well. A voltage/current converter receives a voltage mode error signal based on the noise signal and supplies the current input signal. Current mirror circuitry and the drive circuit in the high side well outputs a sum current derived from the current mode error signal for driving external power devices.

摘要翻译： 集成的高压线性放大器IC，功耗降低，运行更快，管芯尺寸小，包括一个低侧井和一个浮动的高侧井; 用于接收噪声信号的误差放大器; 在低侧阱中的电平移动电路，用于在用于降噪的差分电流模式中将基于噪声信号的电流模式误差信号输出到高侧阱; 和高压侧的驱动电路。 电压/电流转换器基于噪声信号接收电压模式误差信号并提供电流输入信号。 电流镜电路和高侧阱中的驱动电路输出由电流模式误差信号导出的和电流，用于驱动外部功率器件。

公开(公告)号：US07548029B2

公开(公告)日：2009-06-16

申请号：US11144205

申请日：2005-06-02

申请人： Xiao-Chang Cheng ,  Jun Honda ,  Dana Wilhelm

发明人： Xiao-Chang Cheng ,  Jun Honda ,  Dana Wilhelm

IPC分类号： G05F1/00

CPC分类号： G01R17/10 ,  G01R19/0092 ,  G01R31/40 ,  H02M2001/0009

摘要： An apparatus and method for determining the output current in a bridge-connected switched transistor output circuit including high-side and low-side transistor switches, typically MOSFETS. The voltage at a common node between the high and low side switches is sensed, and offset in a first circuit by a fixed amount so that the voltage is positive for all positive or negative output currents of interest. The output current is actually determined in a second circuit which receives the offset voltage signal only predetermined times in relation to the on-time of the low side switch. The first circuit includes a current reference source/level shifter and a current mirror circuit formed of a plurality of transistors in a particular circuit configuration. The second circuit is coupled to an output of the first circuit by a gated NMOS transistor at the desired times to provide the current measurement signal. The second circuit includes a second current reference source having substantially the same electrical characteristics as the first current reference source, and a second plurality of transistors respectively matched to the input side circuit transistors, and connected in the same circuit configuration. In the second circuit, the offset signal is compared with high and low reference signals to provide an indication if the output current exceeds an overcurrent limit, either positively or negatively. The sensing circuit is advantageously integrated with the output circuit gate driver in a single IC.

摘要翻译： 一种用于确定桥接开关晶体管输出电路中的输出电流的装置和方法，该电路包括高侧和低侧晶体管开关，典型地是MOSFET。 感测高侧和低侧开关之间的公共节点处的电压，并且在第一电路中偏移固定的量，使得所有感兴趣的正或负输出电流的电压为正。 输出电流实际上是在相对于低侧开关的导通时间仅接收到预定时间的偏移电压信号的第二电路中确定的。 第一电路包括电流参考源/电平移位器和由特定电路配置中的多个晶体管形成的电流镜电路。 第二电路在期望的时间通过门控NMOS晶体管耦合到第一电路的输出，以提供电流测量信号。 第二电路包括具有与第一电流参考源基本相同的电特性的第二电流参考源和分别与输入侧电路晶体管匹配并以相同电路配置连接的第二多个晶体管。 在第二电路中，将偏移信号与高和低参考信号进行比较，以提供输出电流是否超过过电流极限的指示，无论是正极还是负极。 感测电路有利地与单个IC中的输出电路栅极驱动器集成。

公开(公告)号：US20080297248A1

公开(公告)日：2008-12-04

申请号：US12118320

申请日：2008-05-09

申请人： Jun Honda

发明人： Jun Honda

IPC分类号： H03F3/217

CPC分类号： H03F3/2173 ,  H02M7/21 ,  H02M7/4807 ,  H02M2007/4815 ,  H03F3/38 ,  Y02B70/1441

摘要： A Class D amplifier circuit in accordance with an embodiment of the present application includes a converter stage operable to provide a desired AC voltage and a Class D amplifier stage, connected to the converter stage. The Class D amplifier stage includes a first bi-directional switch connected to the converter stage, a second bi-directional switch, connected in series with the first bi-directional switch, wherein the first and second bi-directional switches are connected across the desired AC voltage provided by the converter stage and a controller operable to turn the first and second bi-directional switches ON and OFF such that a desired voltage is provided at a midpoint node positioned between the first bi-directional switch and the second bi-directional switch.

摘要翻译： 根据本申请的实施例的D类放大器电路包括可操作以提供连接到转换器级的期望AC电压和D类放大器级的转换器级。 D类放大器级包括连接到转换器级的第一双向开关，与第一双向开关串联连接的第二双向开关，其中第一和第二双向开关连接在期望的 由转换器级提供的AC电压和可操作以使第一和第二双向开关接通和断开的控制器，使得在位于第一双向开关和第二双向开关之间的中点节点处提供期望电压 。

公开(公告)号：US20070247774A1

公开(公告)日：2007-10-25

申请号：US11736679

申请日：2007-04-18

申请人： Xiao-chang Cheng ,  Jun Honda ,  Gabriele Bernardinis

发明人： Xiao-chang Cheng ,  Jun Honda ,  Gabriele Bernardinis

IPC分类号： H02H3/08

CPC分类号： H02H1/04

摘要： A circuit for providing over-current protection, the circuit including a gate driver circuit for controlling a bridge circuit including a half bridge stage having high and low switches. The circuit includes a feedback loop circuit for counting over-current indicators sensed during one or more consecutive PWM cycles; wherein when an over-current indicator is sensed, the low switch is turned OFF for duration of a first time period after which the low switch is turned back ON, to enable determination of an over-current condition where false noise signals are rejected thereby preventing circuit shutdowns due to false over-current condition.

摘要翻译： 一种用于提供过电流保护的电路，所述电路包括用于控制包括具有高和低开关的半桥级的桥式电路的栅极驱动电路。 电路包括用于对在一个或多个连续PWM周期期间感测到的过电流指示进行计数的反馈回路电路; 其中，当检测到过电流指示器时，低电平开关在第一时间段的持续时间内被关闭，在此之后低开关被重新接通，以便能够确定错误噪声信号被拒绝的过电流状态，从而防止 由于过电流故障导致电路关断。

公开(公告)号：US20070109707A1

公开(公告)日：2007-05-17

申请号：US11560066

申请日：2006-11-15

申请人： Jun Honda

发明人： Jun Honda

IPC分类号： H02H3/00

CPC分类号： H03K19/00361 ,  H03K17/166

摘要： A gate drive circuit for driving the gate of a power transistor switch comprising a gate drive sourcing circuit supplying gate drive current to the power transistor switch, the gate drive sourcing circuit initially providing a first current to the gate of the power transistor switch and then providing a second current to the gate of the power transistor switch; a circuit for driving the gate drive sourcing circuit, the circuit having a first input for driving the gate drive sourcing circuit to turn on the power transistor switch by providing the first current, the circuit further having a second input coupled to a voltage across the power transistor switch and being controlled by the second input to cause the gate drive sourcing circuit to provide the second current when the voltage across the power transistor switch begins to drop as the power transistor switch begins to turn on.

摘要翻译： 一种用于驱动功率晶体管开关的栅极的栅极驱动电路，包括向功率晶体管开关提供栅极驱动电流的栅极驱动源电路，栅极驱动源电路首先向功率晶体管开关的栅极提供第一电流，然后提供 第二电流到功率晶体管开关的栅极; 用于驱动栅极驱动源电路的电路，该电路具有用于驱动栅极驱动源电路以通过提供第一电流来接通功率晶体管开关的第一输入，该电路还具有耦合到跨过功率的电压的第二输入 晶体管开关并由第二输入端控制，使得当功率晶体管开关导通时，功率晶体管开关两端的电压开始下降时，门驱动源电路提供第二电流。

公开(公告)号：US20060054938A1

公开(公告)日：2006-03-16

申请号：US11221240

申请日：2005-09-06

申请人： Jun Honda ,  Xiao-Chang Cheng

发明人： Jun Honda ,  Xiao-Chang Cheng

IPC分类号： H01L27/148

CPC分类号： H03K17/08122 ,  H03K5/1515 ,  H03K19/0013

摘要： A dead-time generator for incorporation in an integrated circuit wherein the integrated circuit includes a high side and low side gate driver and wherein the high side and low side gate driver drive output switches such that a dead-time is provided between on times of the output switches, the dead-time generator comprising a circuit internal to the integrated circuit having an external terminal at which a dead-time setting component is connected, and wherein the dead-time generator comprises a circuit for providing a discrete dead-time for a range of dead-time setting values at the dead-time setting terminal and wherein, for a plurality of ranges of dead-time setting values at the dead-time setting terminal, the dead-time generator generates an associated plurality of discrete dead-times.

摘要翻译： 一种用于集成在集成电路中的死区时间发生器，其中所述集成电路包括高侧和低侧栅极驱动器，并且其中所述高侧和低侧栅极驱动器驱动输出开关使得在导通时间之间提供死区时间 输出开关，所述死区时间发生器包括所述集成电路内部的电路，所述电路具有连接死区时间设置组件的外部端子，并且其中所述死区时间发生器包括用于为 死区时间设定终端的死区时间设定值的范围，其中，对于死区时间设定终端的死区时间设定值的多个范围，死区时间发生器生成相关的多个离散死时间 。