Magnetic Random Access Memory (MRAM) Layout with Uniform Pattern
    3.
    发明申请
    Magnetic Random Access Memory (MRAM) Layout with Uniform Pattern 有权
    具有统一图案的磁性随机存取存储器(MRAM)布局

    公开(公告)号:US20120087184A1

    公开(公告)日:2012-04-12

    申请号:US12901074

    申请日:2010-10-08

    IPC分类号: G11C11/14 H01R43/00

    摘要: A large scale memory array includes a uniform pattern of uniformly sized dummy bit cells and active bit cells. Sub-arrays within the large scale memory array are separated by the dummy bit cells. Signal distribution circuitry is formed with a width or height corresponding to the width or height of the dummy bit cells so that the signal distribution circuitry occupies the same footprint as the dummy bit cells without disrupting the uniform pattern across the large scale array. Edge dummy cells of a similar size or larger than the standard size bit cells may be placed around the edge of the large scale array to further reduce pattern loading affects.

    摘要翻译: 大规模存储器阵列包括统一大小的虚拟位单元和有源位单元的均匀图案。 大规模存储器阵列中的子阵列由虚拟位单元分隔开。 信号分配电路形成为具有对应于虚拟位单元的宽度或高度的宽度或高度,使得信号分配电路占据与虚拟位单元相同的覆盖区,而不会破坏整个大规模阵列上的均匀图案。 类似大小或大于标准尺寸位单元的边缘虚拟单元可以放置在大规模阵列的边缘周围,以进一步减少图案负载影响。

    Row-decoder circuit and method with dual power systems
    5.
    发明授权
    Row-decoder circuit and method with dual power systems 有权
    具有双电源系统的行解码器电路和方法

    公开(公告)号:US08526266B2

    公开(公告)日:2013-09-03

    申请号:US13032979

    申请日:2011-02-23

    IPC分类号: G11C8/00

    摘要: A Spin-Transfer-Torque Magnetic Random Access Memory includes a dual-voltage row decoder with charge sharing for read operations. The dual-voltage row decoder with charge sharing for read operations reduces read-disturbance failure rates and provides a robust macro design with improved yields. Voltage from one of the power supplies can be applied during a write operation.

    摘要翻译: 旋转转矩磁性随机存取存储器包括具有用于读取操作的电荷共享的双电压行解码器。 具有用于读取操作的电荷共享的双电压行解码器可降低读取干扰故障率,并提供强大的宏设计,提高产量。 在写入操作期间可以应用来自其中一个电源的电压。

    Programmable logic sensing in magnetic random access memory
    7.
    发明授权
    Programmable logic sensing in magnetic random access memory 有权
    磁性随机存取存储器中的可编程逻辑检测

    公开(公告)号:US08593173B2

    公开(公告)日:2013-11-26

    申请号:US13244962

    申请日:2011-09-26

    IPC分类号: H03K19/177

    摘要: A Magnetic Random Access Memory (MRAM) logic circuit includes read sensing circuitry having a first level corresponding to a first category of logic circuitry and a second logic level corresponding to a second category of logic circuitry. The logic circuitry may be switchable between circuitry having the first logic level and circuitry having the second logic level according to the category of the logic circuit being implemented.

    摘要翻译: 磁性随机存取存储器(MRAM)逻辑电路包括具有对应于第一类逻辑电路的第一电平的读取感测电路和对应于第二类逻辑电路的第二逻辑电平。 逻辑电路可以在具有第一逻辑电平的电路和具有第二逻辑电平的电路之间根据所实现的逻辑电路的类别来切换。

    Magnetic random access memory (MRAM) layout with uniform pattern
    9.
    发明授权
    Magnetic random access memory (MRAM) layout with uniform pattern 有权
    具有均匀图案的磁性随机存取存储器(MRAM)布局

    公开(公告)号:US08441850B2

    公开(公告)日:2013-05-14

    申请号:US12901074

    申请日:2010-10-08

    IPC分类号: G11C11/14

    摘要: A large scale memory array includes a uniform pattern of uniformly sized dummy bit cells and active bit cells. Sub-arrays within the large scale memory array are separated by the dummy bit cells. Signal distribution circuitry is formed with a width or height corresponding to the width or height of the dummy bit cells so that the signal distribution circuitry occupies the same footprint as the dummy bit cells without disrupting the uniform pattern across the large scale array. Edge dummy cells of a similar size or larger than the standard size bit cells may be placed around the edge of the large scale array to further reduce pattern loading affects.

    摘要翻译: 大规模存储器阵列包括统一大小的虚拟位单元和有源位单元的均匀图案。 大规模存储器阵列中的子阵列由虚拟位单元分隔开。 信号分配电路形成为具有对应于虚拟位单元的宽度或高度的宽度或高度,使得信号分配电路占据与虚拟位单元相同的覆盖区,而不会破坏整个大规模阵列上的均匀图案。 类似大小或大于标准尺寸位单元的边缘虚拟单元可以放置在大规模阵列的边缘周围,以进一步减少图案负载影响。

    Programmable Logic Sensing in Magnetic Random Access Memory
    10.
    发明申请
    Programmable Logic Sensing in Magnetic Random Access Memory 有权
    磁性随机存取存储器中的可编程逻辑检测

    公开(公告)号:US20130076390A1

    公开(公告)日:2013-03-28

    申请号:US13244962

    申请日:2011-09-26

    IPC分类号: H03K19/177 G11C11/00

    摘要: A Magnetic Random Access Memory (MRAM) logic circuit includes read sensing circuitry having a first level corresponding to a first category of logic circuitry and a second logic level corresponding to a second category of logic circuitry. The logic circuitry may be switchable between circuitry having the first logic level and circuitry having the second logic level according to the category of the logic circuit being implemented.

    摘要翻译: 磁性随机存取存储器(MRAM)逻辑电路包括具有对应于第一类逻辑电路的第一电平的读取感测电路和对应于第二类逻辑电路的第二逻辑电平。 逻辑电路可以在具有第一逻辑电平的电路和具有第二逻辑电平的电路之间根据所实现的逻辑电路的类别来切换。