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    Method for the production of a semiconductor substrate comprising a plurality of gate stacks on a semiconductor substrate, and corresponding semiconductor structure
    3.
    发明申请
    Method for the production of a semiconductor substrate comprising a plurality of gate stacks on a semiconductor substrate, and corresponding semiconductor structure 有权
    用于制造半导体衬底的包括多个栅叠层的半导体衬底的方法以及相应的半导体结构

    公开(公告)号：US20050130370A1

    公开(公告)日：2005-06-16

    申请号：US11010941

    申请日：2004-12-10

    申请人： Jurgen Amon ,  Jurgen Faul ,  Thomas Ruder ,  Thomas Schuster

    发明人： Jurgen Amon ,  Jurgen Faul ,  Thomas Ruder ,  Thomas Schuster

    IPC分类号： H01L21/60 ,  H01L21/8242 ,  H01L27/108 ,  H01L29/04 ,  H01L29/10 ,  H01L31/036 ,  H01L31/0376 ,  H01L31/20

    CPC分类号： H01L21/76897 ,  H01L27/10829 ,  H01L27/10888

    摘要： Method for the production of a semiconductor structure comprising a plurality of gate stacks on a semiconductor substrate which serve as control electrodes for a respective selection transistor of a corresponding memory cell comprising a storage capacitor. Gate stacks are provided next to one another on the substrate provided with a gate dielectric wherein the gate stacks have a lower first layer made of polysilicon, an overlying second layer made of metal silicide, and an upper layer made of silicon nitride. A sidewall oxide is formed on uncovered sidewalls of the first and second layers of the gate stacks, and at least partly the sidewall oxide is removed on those sidewalls of the gate stacks serving as a control electrode which are remote from the associated storage capacitor. Silicon nitride sidewall spacers are then formed on the gate stacks.

    摘要翻译： 一种用于制造半导体结构的方法，该半导体结构包括半导体衬底上的多个栅叠层，其用作包括存储电容器的相应存储单元的相应选择晶体管的控制电极。 在具有栅极电介质的基板上彼此相邻地设置栅极堆叠，其中栅极堆叠具有由多晶硅制成的较低的第一层，由金属硅化物制成的覆盖的第二层和由氮化硅制成的上层。 侧壁氧化物形成在栅极堆叠的第一和第二层的未覆盖的侧壁上，并且至少部分地在用作远离相关联的存储电容器的控制电极的栅极堆叠的侧壁上去除侧壁氧化物。 然后在栅极堆叠上形成氮化硅侧壁间隔物。

    Method for the production of a semiconductor substrate comprising a plurality of gate stacks on a semiconductor substrate, and corresponding semiconductor structure
    4.
    发明授权
    Method for the production of a semiconductor substrate comprising a plurality of gate stacks on a semiconductor substrate, and corresponding semiconductor structure 有权
    用于制造半导体衬底的包括多个栅叠层的半导体衬底的方法以及相应的半导体结构

    公开(公告)号：US07118955B2

    公开(公告)日：2006-10-10

    申请号：US11010941

    申请日：2004-12-10

    申请人： Jurgen Amon ,  Jurgen Faul ,  Thomas Ruder ,  Thomas Schuster

    发明人： Jurgen Amon ,  Jurgen Faul ,  Thomas Ruder ,  Thomas Schuster

    IPC分类号： H01L21/8244

    CPC分类号： H01L21/76897 ,  H01L27/10829 ,  H01L27/10888

    摘要： Method for the production of a semiconductor structure comprising a plurality of gate stacks on a semiconductor substrate which serve as control electrodes for a respective selection transistor of a corresponding memory cell comprising a storage capacitor. Gate stacks are provided next to one another on the substrate provided with a gate dielectric wherein the gate stacks have a lower first layer made of polysilicon, an overlying second layer made of metal silicide, and an upper layer made of silicon nitride. A sidewall oxide is formed on uncovered sidewalls of the first and second layers of the gate stacks, and at least partly the sidewall oxide is removed on those sidewalls of the gate stacks serving as a control electrode which are remote from the associated storage capacitor. Silicon nitride sidewall spacers are then formed on the gate stacks.

    摘要翻译： 一种用于制造半导体结构的方法，该半导体结构包括半导体衬底上的多个栅叠层，其用作包括存储电容器的相应存储单元的相应选择晶体管的控制电极。 在具有栅极电介质的基板上彼此相邻地设置栅极堆叠，其中栅极堆叠具有由多晶硅制成的较低的第一层，由金属硅化物制成的覆盖的第二层和由氮化硅制成的上层。 侧壁氧化物形成在栅极堆叠的第一和第二层的未覆盖的侧壁上，并且至少部分地在用作远离相关联的存储电容器的控制电极的栅极堆叠的侧壁上去除侧壁氧化物。 然后在栅极堆叠上形成氮化硅侧壁间隔物。

    Method for fabricating a semiconductor structure
    5.
    发明申请
    Method for fabricating a semiconductor structure 有权
    半导体结构的制造方法

    公开(公告)号：US20050124124A1

    公开(公告)日：2005-06-09

    申请号：US10995677

    申请日：2004-11-23

    申请人： Jurgen Amon ,  Jurgen Faul ,  Johann Alsmeier ,  Matthias Goldbach ,  Albrecht Kieslich ,  Ralf Muller ,  Dirk Offenberg ,  Thomas Schuster

    发明人： Jurgen Amon ,  Jurgen Faul ,  Johann Alsmeier ,  Matthias Goldbach ,  Albrecht Kieslich ,  Ralf Muller ,  Dirk Offenberg ,  Thomas Schuster

    IPC分类号： H01L27/108 ,  H01L21/265 ,  H01L21/8242 ,  H01L21/336

    CPC分类号： H01L21/26586 ,  H01L27/10861 ,  H01L27/10873 ,  H01L27/10888

    摘要： A method fabricates a semiconductor structure having a plurality of memory cells that are provided in a semiconductor substrate of a first conductivity type and contains a plurality of planar selection transistors and a corresponding plurality of storage capacitors connected thereto. The selection transistors have respective first and second active regions of a second conductivity type. The first active regions are connected to the storage capacitors and the second active regions are connected to respective bit lines, and respective gate stacks, which are provided above the semiconductor substrate in a manner insulated by a gate dielectric. In this case, a single-sided halo doping is effected, and an excessive outdiffusion of the halo doping zones is prevented by introduction of a diffusion-inhibiting species.

    摘要翻译： 一种制造半导体结构的方法，该半导体结构具有设置在第一导电类型的半导体衬底中的多个存储单元，并且包含多个平面选择晶体管和与其连接的对应的多个存储电容器。 选择晶体管具有第二导电类型的相应的第一和第二有源区。 第一有源区连接到存储电容器，并且第二有源区连接到以栅极电介质绝缘的方式设置在半导体衬底之上的相应位线和相应的栅极堆叠。 在这种情况下，实现单面晕圈掺杂，并且通过引入扩散抑制物质来防止晕圈掺杂区的过度扩散。

    Cosmetic composition for the creation of a cosmetic coating having a metallic, multicolored iridescent appearance; and artificial fingernail
    6.
    发明授权
    Cosmetic composition for the creation of a cosmetic coating having a metallic, multicolored iridescent appearance; and artificial fingernail 有权
    用于产生具有金属，多彩虹彩外观的化妆品涂层的化妆品组合物; 和人造指甲

    公开(公告)号：US08911546B2

    公开(公告)日：2014-12-16

    申请号：US10582066

    申请日：2004-12-09

    申请人： Frank Henglein ,  Thomas Schuster

    发明人： Frank Henglein ,  Thomas Schuster

    IPC分类号： C09C1/00 ,  A61Q1/04 ,  A61Q3/02 ,  A61K8/26

    CPC分类号： A61Q1/04 ,  A61K8/0254 ,  A61K8/26 ,  A61K2800/437 ,  A61Q3/02

    摘要： The invention relates to a cosmetic composition for creating a cosmetic coating having a metallic and multicolored iridescent appearance, comprising a liquid phase and a PVD aluminum pigment, wherein said PVD aluminum pigment has diffractive structures containing from approximately 5,000 to approximately 20,000 structural elements per cm and a metallic aluminum content of from 90% to 100% by weight, based on the weight of the aluminum pigment, and is present in the cosmetic composition at a pigmentation level of from 1.0 to 8.0% by weight, based on the total weight of the cosmetic composition. The invention further relates to an artificial fingernail.

    摘要翻译： 本发明涉及一种用于产生具有金属和多彩虹彩外观的化妆品涂料的化妆品组合物，其包含液相和PVD铝颜料，其中所述PVD铝颜料具有包含约5,000至约20,000个结构元素/ cm的衍射结构， 基于铝颜料的重量，金属铝含量为90重量％至100重量％，并且以1.0至8.0重量％的颜料含量存在于化妆品组合物中，基于总重量 化妆品组成。 本发明还涉及一种人造指甲。

    Converter for powering electric motor
    7.
    发明授权
    Converter for powering electric motor 有权
    电动马达转换器

    公开(公告)号：US08804384B2

    公开(公告)日：2014-08-12

    申请号：US10584337

    申请日：2004-11-23

    申请人： Thomas Schuster ,  Harald Wolf

    发明人： Thomas Schuster ,  Harald Wolf

    IPC分类号： H02H7/122 ,  H02M7/537

    CPC分类号： H02M7/53871 ,  H02M2001/0009 ,  H02P2205/01

    摘要： A converter includes at least device(s) for sensing the currents fed to the electric motor powered by the converter, the device(s) for current detection being arranged inside the converter, and the signals of the device(s) being fed to a nonlinear filter, whose output signals are fed to an additional filter that is connected to an analog-to-digital converter.

    摘要翻译： A转换器包括用于感测馈送到由转换器供电的电动机的电流的装置，用于电流检测的装置布置在转换器内部，并且装置的信号被馈送到 非线性滤波器，其输出信号被馈送到连接到模拟 - 数字转换器的附加滤波器。

    Method for fabricating field-effect transistor structures with gate electrodes with a metal layer
    10.
    发明授权
    Method for fabricating field-effect transistor structures with gate electrodes with a metal layer 有权
    用具有金属层的栅电极制造场效晶体管结构的方法

    公开(公告)号：US07265007B2

    公开(公告)日：2007-09-04

    申请号：US11167510

    申请日：2005-06-27

    申请人： Johann Harter ,  Thomas Schuster

    发明人： Johann Harter ,  Thomas Schuster

    IPC分类号： H01L21/336 ,  H01L21/8234 ,  H01L21/3205 ,  H01L21/4763 ,  H01L21/44

    CPC分类号： H01L21/76897 ,  H01L21/28247 ,  H01L21/76843 ,  H01L21/76847 ,  H01L21/7685 ,  H01L21/823437 ,  H01L21/823468 ,  H01L21/823475

    摘要： Provided is a method for fabricating gate electrode structures each having at least one individual polysilicon layer and a metal layer. A polysilicon layer is provided and patterned prior to the application of the gate metal. Trenches between the resulting gate structures are filled, and the polysilicon is drawn back to below the top edge of the fillings. The relief formed from the fillings and the polysilicon which has been caused to recede forms a shape which is used to pattern the gate metal without a lithographic step. The provision of a gate sacrificial layer, which is patterned together with the polysilicon layer, makes it possible to form contact structures from a contact metal prior to the application of the gate metal.

    摘要翻译： 提供了一种用于制造各自具有至少一个单独的多晶硅层和金属层的栅电极结构的方法。 在施加栅极金属之前提供并图案化多晶硅层。 在所得到的栅极结构之间的沟槽被填充，并且多晶硅被拉回到填充物的顶部边缘的下方。 由填充物形成的凹陷和已经被后退的多晶硅形成用于在没有光刻步骤的情况下图案化栅极金属的形状。 提供与多晶硅层一起构图的栅极牺牲层使得可以在施加栅极金属之前从接触金属形成接触结构。