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1.发明授权Hydrogen barrier for protecting ferroelectric capacitors in a semiconductor device and methods for fabricating the same 有权用于保护半导体器件中的铁电电容器的氢屏障及其制造方法公开(公告)号：US06984857B2
公开(公告)日：2006-01-10
申请号：US10620516
申请日：2003-07-16
申请人： K. R. Udayakumar , Martin G. Albrecht , Theodore S. Moise, IV , Scott R. Summerfelt , Sanjeev Aggarwal , Jeff L. Large
发明人： K. R. Udayakumar , Martin G. Albrecht , Theodore S. Moise, IV , Scott R. Summerfelt , Sanjeev Aggarwal , Jeff L. Large
IPC分类号： H01L29/76
CPC分类号： H01L28/57 , H01L23/564 , H01L2924/0002 , H01L2924/00
摘要： Semiconductor devices and fabrication methods are presented, in which a hydrogen barrier is provided above a ferroelectric capacitor to prevent degradation of the ferroelectric material during back-end manufacturing processes employing hydrogen. The hydrogen barrier comprises silicon rich silicon oxide or amorphous silicon, which can be used in combination with an aluminum oxide layer to inhibit diffusion of process-related hydrogen into the ferroelectric capacitor layer.
摘要翻译： 提出了半导体器件和制造方法，其中在铁电电容器上方设置氢气阻挡层，以防止在使用氢的后端制造工艺期间铁电材料的劣化。 氢势垒包括富硅氧化物或非晶硅，其可以与氧化铝层组合使用以抑制工艺相关氢扩散到铁电电容器层中。
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2.发明授权Use of amorphous aluminum oxide on a capacitor sidewall for use as a hydrogen barrier 有权在电容器侧壁上使用无定形氧化铝作为氢气屏障公开(公告)号：US06876021B2
公开(公告)日：2005-04-05
申请号：US10303560
申请日：2002-11-25
申请人： J. Scott Martin , Scott R. Summerfelt , Theodore S. Moise , Kelly J. Taylor , Luigi Colombo , Sanjeev Aggarwal , Sirisha Kuchimanchi , K. R. Udayakumar , Lindsey Hall
发明人： J. Scott Martin , Scott R. Summerfelt , Theodore S. Moise , Kelly J. Taylor , Luigi Colombo , Sanjeev Aggarwal , Sirisha Kuchimanchi , K. R. Udayakumar , Lindsey Hall
IPC分类号： H01L21/02 , H01L21/8246 , H01L27/115 , H01L31/119
CPC分类号： H01L27/11502 , H01L27/11507 , H01L28/55
摘要： The present invention forms sidewall diffusion barrier layer(s) that mitigate hydrogen contamination of ferroelectric capacitors. Sidewall diffusion barrier layer(s) of the present invention are formed via a physical vapor deposition process at a low temperature. By so doing, the sidewall diffusion barrier layer(s) are substantially amorphous and provide superior protection against hydrogen diffusion than conventional and/or crystalline sidewall diffusion barrier layers.
摘要翻译： 本发明形成减轻铁电电容器的氢污染的侧壁扩散阻挡层。 本发明的侧壁扩散阻挡层通过物理气相沉积工艺在低温下形成。 通过这样做，侧壁扩散阻挡层基本上是无定形的，并提供优于常规和/或结晶侧壁扩散阻挡层的氢气扩散保护。
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3.发明授权Low silicon-hydrogen sin layer to inhibit hydrogen related degradation in semiconductor devices having ferroelectric components 有权低硅氢层，用于抑制具有铁电元件的半导体器件中的氢相关退化公开(公告)号：US07019352B2
公开(公告)日：2006-03-28
申请号：US10635994
申请日：2003-08-07
申请人： K. R. Udayakumar , Martin G. Albrecht , Theodore S. Moise , Scott R. Summerfelt , Sarah I. Hartwig
发明人： K. R. Udayakumar , Martin G. Albrecht , Theodore S. Moise , Scott R. Summerfelt , Sarah I. Hartwig
IPC分类号： H01L27/01
CPC分类号： H01L21/76829 , H01L21/3185 , H01L21/76828 , H01L21/76832 , H01L21/76834 , H01L27/11502 , H01L27/11507 , H01L28/57
摘要： Semiconductor devices and fabrication methods are disclosed, in which one or more low silicon-hydrogen SiN barriers are provided to inhibit hydrogen diffusion into ferroelectric capacitors and into transistor gate dielectric interface areas. The barriers may be used as etch stop layers in various levels of the semiconductor device structure above and/or below the level at which the ferroelectric capacitors are formed so as to reduce the hydrogen related degradation of the switched polarization properties of the ferroelectric capacitors and to reduce negative bias temperature instability in the device transistors.
摘要翻译： 公开了半导体器件和制造方法，其中提供一个或多个低硅氢SiN栅极以阻止氢扩散到铁电电容器中并进入晶体管栅极电介质界面区域。 可以将阻挡层用作在形成强电介质电容器的电平以上和/或以下的半导体器件结构的各种级别的蚀刻停止层，以便降低铁电电容器的开关极化特性的氢相关劣化，并且 降低器件晶体管的负偏压温度不稳定性。
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4.发明授权公开(公告)号：US06982448B2
公开(公告)日：2006-01-03
申请号：US10803445
申请日：2004-03-18
CPC分类号： H01L27/11507 , H01L28/57
摘要： Hydrogen barriers and fabrication methods are provided for protecting ferroelectric capacitors (CFE) from hydrogen diffusion in semiconductor devices (102), wherein nitrided aluminum oxide (N—AlOx) is formed over a ferroelectric capacitor (CFE), and one or more silicon nitride layers (112, 117) are formed over the nitrided aluminum oxide (N—AlOx). Hydrogen barriers are also provided in which an aluminum oxide (AlOx, N—AlOx) is formed over the ferroelectric capacitors (CFE), with two or more silicon nitride layers (112, 117) formed over the aluminum oxide (AlOx, N—AlOx), wherein the second silicon nitride layer (112) comprises a low silicon-hydrogen SiN material.
摘要翻译： 提供了氢屏障和制造方法，用于保护铁电电容器（CFE）在半导体器件（102）中的氢扩散，其中氮化的氧化铝（N-AlO x X）为 形成在铁电电容器（CFE）上，并且在氮化的氧化铝（N-AlO x N）上形成一个或多个氮化硅层（112,117）。 还提供了氢屏障，其中在铁电电容器（C FE）上形成氧化铝（AlO x N，N-AlO x x） ，其上形成有氧化铝（AlO x N，N-AlO x）上的两个或更多个氮化硅层（112,117），其中第二氮化硅层（112 ）包括低硅氢SiN材料。
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5.发明授权公开(公告)号：US07183602B2
公开(公告)日：2007-02-27
申请号：US11033224
申请日：2005-01-11
CPC分类号： H01L27/11507 , H01L28/57
摘要： Hydrogen barriers and fabrication methods are provided for protecting ferroelectric capacitors (CFE) from hydrogen diffusion in semiconductor devices (102), wherein nitrided aluminum oxide (N—AlOx) is formed over a ferroelectric capacitor (CFE), and one or more silicon nitride layers (112, 117) are formed over the nitrided aluminum oxide (N—AlOx). Hydrogen barriers are also provided in which an aluminum oxide (AlOx, N—AlOx) is formed over the ferroelectric capacitors (CFE), with two or more silicon nitride layers (112, 117) formed over the aluminum oxide (AlOx, N—AlOx), wherein the second silicon nitride layer (112) comprises a low silicon-hydrogen SiN material.
摘要翻译： 提供氢屏障和制造方法用于在半导体器件（102）中保护铁电电容器（C LIMIT）免受氢扩散，其中氮化的氧化铝（N-AlOx）形成在铁电电容器（C < 在氮化的氧化铝（N-AlOx）上形成一个或多个氮化硅层（112,117）。 还提供了氢屏障，其中在铁电电容器（CFE）上形成氧化铝（AlOx，N-AlOx），其上形成有两个或更多个氮化硅层（112,117） 氧化铝（AlOx，N-AlOx），其中第二氮化硅层（112）包括低硅氢SiN材料。
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公开(公告)号：US06841396B2
公开(公告)日：2005-01-11
申请号：US10440697
申请日：2003-05-19
IPC分类号： H01L21/00 , H01L21/20 , H01L21/8242 , H01L21/8246 , H01L27/115
CPC分类号： H01L27/11502 , H01L27/11507
摘要： A ferroelectric memory device comprises a logic programmable capacitance reference circuit. The circuit is adapted to generate a reference voltage during a sense mode of operation, wherein the reference voltage comprises a value that is a function of one more memory conditions. The memory device further comprises a bit line pair, wherein a first bit line of the bit line pair has a ferroelectric capacitor coupled thereof for sensing thereof, and a second bit line of the bit line pair is coupled to the reference voltage. A sense circuit is coupled to the bit line pair and is configured to detect a data state associated with the ferroelectric capacitor using a voltage associated with the first bit line and reference voltage on the second bit line.
摘要翻译： 铁电存储器件包括逻辑可编程电容参考电路。 电路适于在感测操作模式期间产生参考电压，其中参考电压包括作为一个以上存储器条件的函数的值。 存储器件还包括位线对，其中位线对的第一位线具有耦合的铁电电容器用于感测位线对，并且位线对的第二位线耦合到参考电压。 感测电路耦合到位线对，并且被配置为使用与第一位线相关联的电压和第二位线上的参考电压来检测与铁电电容器相关联的数据状态。
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7.发明授权Ferroelectric memory with wide operating voltage and multi-bit storage per cell 有权铁电存储器具有宽的工作电压和每个单元的多位存储公开(公告)号：US06856534B2
公开(公告)日：2005-02-15
申请号：US10260467
申请日：2002-09-30
IPC分类号： G11C11/22 , G11C11/56 , H01L21/8246 , H01L27/105 , G11C7/00
CPC分类号： G11C11/5657 , G11C11/22 , G11C2211/5641
摘要： Apparatus and methods are described for a multi-level FeRAM memory device. Using write and read circuits associated with the memory device, multiple data states may be written to and read from the ferroelectric memory device which are associated with a single polarization direction, thereby allowing for a single cell to contain more than one bit of data.
摘要翻译： 描述了用于多级FeRAM存储器件的装置和方法。 使用与存储器件相关联的写入和读取电路，可以将多个数据状态写入到与单个极化方向相关联的铁电存储器件并从其读取，从而允许单个单元包含多于一个位的数据。
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