公开(公告)号：US11621126B2

公开(公告)日：2023-04-04

申请号：US17467841

申请日：2021-09-07

Applicant: KEMET Electronics Corporation

Inventor： John Bultitude ,  Nathan A. Reed ,  Allen Templeton ,  James R. Magee ,  James Davis ,  Abhijit Gurav ,  Hunter Hayes ,  Hanzheng Guo

IPC: H01G4/12 ,  C04B35/465 ,  H01G4/30 ,  C04B35/50 ,  C04B35/495 ,  H01G4/40

Abstract: Provided is an improved multilayered ceramic capacitor and an electronic device comprising the multilayered ceramic capacitor. The multilayer ceramic capacitor comprises first conductive plates electrically connected to first external terminations and second conductive plates electrically connected to second external terminations. The first conductive plates and second conductive plates form a capacitive couple. A ceramic portion is between the first conductive plates and said second conductive plates wherein the ceramic portion comprises paraelectric ceramic dielectric. The multilayer ceramic capacitor has a rated DC voltage and a rated AC VPP wherein the rated AC VPP is higher than the rated DC voltage.

公开(公告)号：US20220076892A1

公开(公告)日：2022-03-10

申请号：US17467841

申请日：2021-09-07

Applicant: KEMET Electronics Corporation

Inventor： John Bultitude ,  Nathan A. Reed ,  Allen Templeton ,  James R. Magee ,  James Davis ,  Abhijit Gurav ,  Hunter Hayes ,  Hanzheng Guo

IPC: H01G4/30 ,  H01G4/12 ,  H01G4/40 ,  C04B35/465

Abstract: Provided is an improved multilayered ceramic capacitor and an electronic device comprising the multilayered ceramic capacitor. The multilayer ceramic capacitor comprises first conductive plates electrically connected to first external terminations and second conductive plates electrically connected to second external terminations. The first conductive plates and second conductive plates form a capacitive couple. A ceramic portion is between the first conductive plates and said second conductive plates wherein the ceramic portion comprises paraelectric ceramic dielectric. The multilayer ceramic capacitor has a rated DC voltage and a rated AC VPP wherein the rated AC VPP is higher than the rated DC voltage.

公开(公告)号：US12040135B2

公开(公告)日：2024-07-16

申请号：US18107154

申请日：2023-02-08

Applicant: KEMET Electronics Corporation

Inventor： John Bultitude ,  Nathan A. Reed ,  Allen Templeton ,  James R. Magee ,  James Davis ,  Abhijit Gurav ,  Hunter Hayes ,  Hanzheng Guo

IPC: H01G4/12 ,  C04B35/465 ,  C04B35/495 ,  C04B35/50 ,  H01G4/30 ,  H01G4/40

CPC classification number: H01G4/1245 ,  C04B35/465 ,  C04B35/495 ,  C04B35/50 ,  H01G4/1227 ,  H01G4/30 ,  H01G4/306 ,  H01G4/40 ,  C04B2235/66

Abstract: Provided is an improved multilayered ceramic capacitor and an electronic device comprising the multilayered ceramic capacitor. The multilayer ceramic capacitor comprises first conductive plates electrically connected to first external terminations and second conductive plates electrically connected to second external terminations. The first conductive plates and second conductive plates form a capacitive couple. A ceramic portion is between the first conductive plates and said second conductive plates wherein the ceramic portion comprises paraelectric ceramic dielectric. The multilayer ceramic capacitor has a rated DC voltage and a rated AC VPP wherein the rated AC VPP is higher than the rated DC voltage.

公开(公告)号：US11744018B2

公开(公告)日：2023-08-29

申请号：US17147908

申请日：2021-01-13

Applicant: KEMET Electronics Corporation

Inventor： John Bultitude ,  Peter Alexandre Blais ,  James A. Burk ,  Galen W. Miller ,  Hunter Hayes ,  Allen Templeton ,  Lonnie G. Jones ,  Mark R. Laps

IPC: H05K1/18 ,  H01G4/38 ,  H05K1/14 ,  H05K1/02 ,  H05K3/32 ,  H01L29/20 ,  H01G4/30 ,  H01L25/07 ,  H01L29/16

CPC classification number: H05K1/181 ,  H01G4/38 ,  H05K1/0272 ,  H05K1/145 ,  H05K3/328 ,  H01G4/30 ,  H01L25/072 ,  H01L29/1608 ,  H01L29/2003 ,  H05K2201/10015 ,  H05K2201/10166 ,  H05K2201/10545

Abstract: Provided is a high-density multi-component package comprising a first module interconnect pad and a second module interconnect pad. At least two electronic components are mounted to and between the first module interconnect pad and the second module interconnect pad wherein a first electronic component is vertically oriented relative to the first module interconnect pad. A second electronic component is vertically oriented relative to the second module interconnect pad.

公开(公告)号：US20230187134A1

公开(公告)日：2023-06-15

申请号：US18107154

申请日：2023-02-08

Applicant: KEMET Electronics Corporation

Inventor： John Bultitude ,  Nathan A. Reed ,  Allen Templeton ,  James R. Magee ,  James Davis ,  Abhijit Gurav ,  Hunter Hayes

IPC: H01G4/12 ,  H01G4/30 ,  C04B35/50 ,  C04B35/495 ,  C04B35/465 ,  H01G4/40

CPC classification number: H01G4/1245 ,  H01G4/306 ,  C04B35/50 ,  C04B35/495 ,  C04B35/465 ,  H01G4/1227 ,  H01G4/30 ,  H01G4/40 ,  C04B2235/66

Abstract: Provided is an improved multilayered ceramic capacitor and an electronic device comprising the multilayered ceramic capacitor. The multilayer ceramic capacitor comprises first conductive plates electrically connected to first external terminations and second conductive plates electrically connected to second external terminations. The first conductive plates and second conductive plates form a capacitive couple. A ceramic portion is between the first conductive plates and said second conductive plates wherein the ceramic portion comprises paraelectric ceramic dielectric. The multilayer ceramic capacitor has a rated DC voltage and a rated AC VPP wherein the rated AC VPP is higher than the rated DC voltage.

公开(公告)号：US20210227693A1

公开(公告)日：2021-07-22

申请号：US17147908

申请日：2021-01-13

Applicant: KEMET Electronics Corporation

Inventor： John Bultitude ,  Peter Alexandre Blais ,  James A. Burk ,  Galen W. Miller ,  Hunter Hayes ,  Allen Templeton ,  Lonnie G. Jones ,  Mark R. Laps

IPC: H05K1/18 ,  H01G4/38 ,  H05K1/14 ,  H05K1/02 ,  H05K3/32

Abstract: Provided is a high-density multi-component package comprising a first module interconnect pad and a second module interconnect pad. At least two electronic components are mounted to and between the first module interconnect pad and the second module interconnect pad wherein a first electronic component is vertically oriented relative to the first module interconnect pad. A second electronic component is vertically oriented relative to the second module interconnect pad.