公开(公告)号：US20230410868A1

公开(公告)日：2023-12-21

申请号：US18184682

申请日：2023-03-16

Applicant: Kioxia Corporation

Inventor： Hideyuki SUGIYAMA ,  Kenji FUKUDA ,  Yoshiaki ASAO ,  Kazumasa SUNOUCHI

IPC: G11C11/16

CPC classification number: G11C11/1659 ,  G11C11/1675

Abstract: According to one embodiment, a magnetic memory device includes a first wiring line, a plurality of second wiring lines, a plurality of first memory cells each including a first magnetoresistance effect element and a first selector connected in series, and a first switch. A respective one of the first memory cells is connected between the first wiring line and a respective one of the second wiring lines, a first voltage is applied to the second wiring line connected to a selected first memory cell, and a second voltage is applied to the second wiring line connected to a non-selected first memory cell, a first terminal of the first switch is connected to the first wiring line, and a third voltage is applied to a second terminal of the first switch.

公开(公告)号：US20220301621A1

公开(公告)日：2022-09-22

申请号：US17461858

申请日：2021-08-30

Applicant: KIOXIA CORPORATION

Inventor： Masahiko NAKAYAMA ,  Kazumasa SUNOUCHI

IPC: G11C13/00

Abstract: A storage device includes a memory cell array in which a plurality of memory cells respectively including a variable resistance memory element are divided into a plurality of memory blocks, the plurality of memory cells including a first memory cell and a second memory cell that are in the same memory block, and a detection circuit. During a read operation in which the first memory cell is a read target, the detection circuit compares a first resistance value, which is a resistance value of the variable resistance memory element in the first memory cell, with a second resistance value, which is a resistance value of the variable resistance memory element in the second memory cell, and determines a value of data stored in the first memory cell based on whether or not the first resistance value is higher or lower than the second resistance value.

公开(公告)号：US20220293171A1

公开(公告)日：2022-09-15

申请号：US17459467

申请日：2021-08-27

Applicant: KIOXIA CORPORATION

Inventor： Masahiko NAKAYAMA ,  Kazumasa SUNOUCHI ,  Jyunichi OZEKI

IPC: G11C13/00 ,  G11C5/06

Abstract: According to one embodiment, a storage device includes first wirings extending in a first direction and second wirings extending in a second direction. A memory cells are connected between the first wirings and the second wirings and include a variable resistance memory element. A first drive circuit is provided for supplying voltages to the first wirings, and a second drive circuit is provided for supplying voltages to the second wirings. The first drive circuit applies a first voltage to a selected first wiring, the second drive circuit applies a second voltage to a selected second wiring. A voltage between the second voltage and one-half of the sum of the first and second voltages is applied to a non-selected first wiring, and a voltage between the first voltage and one-half of the sum of the first and second voltages is applied to a non-selected second wiring.

公开(公告)号：US20220278168A1

公开(公告)日：2022-09-01

申请号：US17750002

申请日：2022-05-20

Applicant: KIOXIA CORPORATION

Inventor： Masahiko NAKAYAMA ,  Kazumasa SUNOUCHI ,  Gaku SUDO ,  Tadashi KAI

IPC: H01L27/22 ,  H01L43/02

Abstract: A nonvolatile storage device includes first interconnections extending in a first direction and second interconnections extending in a second direction intersecting the first direction. Memory cells are formed at intersections between first and second interconnections. Each memory cell includes a resistance change element and a selector. In the arrangement of memory cells, all memory cells that are connected to any particular first interconnection are aligned along that first interconnection, and all memory cells connected to any particular second interconnection are alternately staggered in the first direction across a width of that second interconnection.