公开(公告)号：US20240371448A1

公开(公告)日：2024-11-07

申请号：US18775119

申请日：2024-07-17

Applicant: KIOXIA CORPORATION

Inventor： Shinya OKUNO ,  Shigeki NAGASAKA ,  Toshiyuki KOUCHI

IPC: G11C16/32 ,  G06F5/06 ,  G06F13/16 ,  G11C7/02 ,  G11C7/10 ,  G11C16/04 ,  G11C16/10 ,  G11C16/12 ,  G11C16/16 ,  G11C16/26

Abstract: A semiconductor device includes a memory circuit, a first FIFO, a second FIFO and an input/output circuit. The memory circuit outputs data. The first FIFO receives data from the memory circuit and outputs data synchronously with a first clock signal. The second FIFO receives data output from the first FIFO and outputs data synchronously with the first clock signal. The input/output circuit outputs data output from the second FIFO. The second FIFO is disposed in the vicinity of the input/output circuit than the first FIFO.

公开(公告)号：US20230326535A1

公开(公告)日：2023-10-12

申请号：US18333661

申请日：2023-06-13

Applicant: KIOXIA CORPORATION

Inventor： Shinya OKUNO ,  Shigeki NAGASAKA ,  Toshiyuki KOUCHI

IPC: G11C16/32 ,  G11C16/26 ,  G11C16/16 ,  G11C16/12 ,  G11C7/02 ,  G11C7/10 ,  G11C16/10 ,  G06F5/06 ,  G06F13/16

CPC classification number: G11C16/32 ,  G11C16/26 ,  G11C16/16 ,  G11C16/12 ,  G11C7/02 ,  G11C7/1012 ,  G11C7/1039 ,  G11C7/106 ,  G11C7/1066 ,  G11C16/10 ,  G06F5/06 ,  G06F13/1673 ,  G11C16/0483

Abstract: A semiconductor device includes a memory circuit, a first FIFO, a second FIFO and an input/output circuit. The memory circuit outputs data. The first FIFO receives data from the memory circuit and outputs data synchronously with a first clock signal. The second FIFO receives data output from the first FIFO and outputs data synchronously with the first clock signal. The input/output circuit outputs data output from the second FIFO. The second FIFO is disposed in the vicinity of the input/output circuit than the first FIFO.

公开(公告)号：US20220189563A1

公开(公告)日：2022-06-16

申请号：US17689300

申请日：2022-03-08

Applicant: KIOXIA CORPORATION

Inventor： Shinya OKUNO ,  Shigeki NAGASAKA ,  Toshiyuki KOUCHI

IPC: G11C16/32 ,  G11C16/26 ,  G11C16/16 ,  G11C16/12 ,  G11C7/02 ,  G11C7/10 ,  G11C16/10 ,  G06F5/06 ,  G06F13/16

Abstract: A semiconductor device includes a memory circuit, a first FIFO, a second FIFO and an input/output circuit. The memory circuit outputs data. The first FIFO receives data from the memory circuit and outputs data synchronously with a first clock signal. The second FIFO receives data output from the first FIFO and outputs data synchronously with the first clock signal. The input/output circuit outputs data output from the second FIFO. The second FIFO is disposed in the vicinity of the input/output circuit than the first FIFO.