公开(公告)号：US11502125B2

公开(公告)日：2022-11-15

申请号：US16816775

申请日：2020-03-12

申请人： KIOXIA CORPORATION

发明人： Masaru Toko ,  Tadaomi Daibou ,  Junichi Ito ,  Taichi Igarashi ,  Tadashi Kai

IPC分类号： H01L27/22 ,  H01L43/10 ,  G11C11/16 ,  H01L43/02 ,  H01L43/12

摘要： A magnetoresistive memory device according to one embodiment includes: first and second layer stacks, each of which includes: a first ferromagnetic layer having a magnetization directed in a first direction; a non-magnetic first conductive layer above the first ferromagnetic layer, a second ferromagnetic layer provided above the first conductive layer and having a magnetization directed in a second direction different from the first direction, a first insulating layer on an upper surface of the second ferromagnetic layer, and a third ferromagnetic layer above the first insulating layer. The second ferromagnetic layer of the second layer stack is thicker than the second ferromagnetic layer of the first layer stack.

公开(公告)号：US12114577B2

公开(公告)日：2024-10-08

申请号：US17465696

申请日：2021-09-02

申请人： Kioxia Corporation

发明人： Taichi Igarashi

IPC分类号： H10N50/80 ,  H10B61/00 ,  H10N50/01

CPC分类号： H10N50/80 ,  H10B61/10 ,  H10N50/01

摘要： In general, according to one embodiment, a magnetoresistance memory device includes: a first conductor; a second conductor on the first conductor; a first element on the second conductor; a third conductor on the first element; and a first layer stack on the third conductor. The second conductor is amorphous. The first element includes a silicon oxide introduced with a dopant. The first layer stack includes a first magnetic layer, a second magnetic layer, and a first insulating layer between the first magnetic layer and the second magnetic layer.

公开(公告)号：US11316097B2

公开(公告)日：2022-04-26

申请号：US17003846

申请日：2020-08-26

申请人： KIOXIA CORPORATION

发明人： Taichi Igarashi ,  Tadaomi Daibou ,  Junichi Ito ,  Tadashi Kai ,  Shogo Itai ,  Toshiyuki Enda

IPC分类号： H01L43/02 ,  H01L27/22 ,  G11C11/16 ,  G11C11/34 ,  G11C11/54 ,  H01L43/10

摘要： According to one embodiment, a memory device includes a first wiring extending in a first direction, and a second wiring extending in a second direction that intersects the first direction. A memory cell is between the first wiring and the second wiring and includes a resistive memory element and a switching element that are connected in series between the first wiring and the second wiring. An insulating region surrounds side surfaces of the memory cell. The insulating region includes a first insulating part adjacent to a side surface of the resistive memory element and a second insulating part adjacent to a side surface of the switching element. The second insulating part has a higher thermal conductivity than the first insulating part.