公开(公告)号：US07602255B1

公开(公告)日：2009-10-13

申请号：US11861144

申请日：2007-09-25

申请人： Kang-Wei Lai ,  Ninh D. Ngo ,  Kazi Asaduzzaman ,  Mian Z. Smith ,  Wanli Chang ,  Tim Tri Hoang

发明人： Kang-Wei Lai ,  Ninh D. Ngo ,  Kazi Asaduzzaman ,  Mian Z. Smith ,  Wanli Chang ,  Tim Tri Hoang

IPC分类号： H03L7/00

CPC分类号： H03L7/0895 ,  H03L7/0812

摘要： A feedback loop, such as a phase-locked loop, on an integrated circuit has a detector, a charge pump, and a loop filter. The charge pump adjusts its output current in response to variations in a process of the integrated circuit to reduce variations in the loop bandwidth. The charge pump also adjusts its output current in response to variations in a resistance of a resistor in the loop filter to reduce variations in the loop bandwidth. The charge pump can also adjust its output current in response to variations in a temperature of the integrated circuit to reduce variations in the loop bandwidth. A delay-locked loop on an integrated circuit has a phase detector and a charge pump. The charge pump adjusts its output current in response to variations in the temperature and the process of the integrated circuit to reduce changes in the loop bandwidth.

摘要翻译： 在集成电路上的反馈回路（例如锁相环）具有检测器，电荷泵和环路滤波器。 电荷泵响应于集成电路的过程中的变化来调节其输出电流，以减少环路带宽的变化。 电荷泵还响应于环路滤波器中的电阻器的电阻的变化来调整其输出电流，以减少环路带宽的变化。 电荷泵还可以响应于集成电路的温度变化来调节其输出电流，以减少环路带宽的变化。 集成电路上的延迟锁定环路具有相位检测器和电荷泵。 电荷泵响应于集成电路的温度和过程的变化来调整其输出电流，以减少环路带宽的变化。

公开(公告)号：US07619451B1

公开(公告)日：2009-11-17

申请号：US11670971

申请日：2007-02-03

申请人： Tim Tri Hoang ,  Sergey Shumarayev ,  Kazi Asaduzzaman ,  Wanli Chang ,  Mian Z. Smith ,  Kang-Wei Lai ,  Leon Zheng

发明人： Tim Tri Hoang ,  Sergey Shumarayev ,  Kazi Asaduzzaman ,  Wanli Chang ,  Mian Z. Smith ,  Kang-Wei Lai ,  Leon Zheng

IPC分类号： H03L7/06

CPC分类号： H03L7/0995 ,  G06F1/12 ,  H03L7/081 ,  H03L7/0812

摘要： Techniques are provided for compensating for phase and timing delays in clock signals generated by phase-locked loops and delay-locked loops on integrated circuits. Circuit elements coupled in a feedback loop of a locked circuit can compensate for the timing and phase delays between an input pin and an output pin. Other circuit elements coupled in the feedback loop of a locked circuit can compensate for the delay between an input pin and a destination circuit element. Still other circuit elements coupled in an input reference path of a locked circuit preserve a timing relationship between input clock and input data signals. A clock signal and a data signal received at a destination circuit element have the same phase and timing relationship that exists between the input clock and input data signals at input pins.

摘要翻译： 提供了用于补偿由集成电路上的锁相环和延迟锁定环路产生的时钟信号中的相位和定时延迟的技术。 耦合在锁定电路的反馈回路中的电路元件可以补偿输入引脚和输出引脚之间的定时和相位延迟。 耦合在锁定电路的反馈环路中的其它电路元件可以补偿输入引脚和目的地电路元件之间的延迟。 耦合在锁定电路的输入参考路径中的其他电路元件保留输入时钟和输入数据信号之间的定时关系。 在目的地电路元件处接收的时钟信号和数据信号在输入引脚的输入时钟和输入数据信号之间具有相同的相位和定时关系。

公开(公告)号：US07064620B1

公开(公告)日：2006-06-20

申请号：US10761897

申请日：2004-01-20

申请人： Kang-Wei Lai ,  Greg Starr

发明人： Kang-Wei Lai ,  Greg Starr

IPC分类号： H03B27/00

CPC分类号： H03L7/0996 ,  H03K3/0322 ,  H03K5/135 ,  H03K5/15013 ,  H04L7/033

摘要： Circuits, methods, and apparatus that provide a sequential start-up of outputs of an oscillator following a power-up or restart. The outputs are gated by enable signals. These enable signals are derived sequentially, the first in a series being triggered by a specific output of the oscillator.

摘要翻译： 在上电或重新启动后提供振荡器输出的顺序启动的电路，方法和装置。 输出由使能信号选通。 这些使能信号依次导出，串联中的第一个由振荡器的特定输出触发。

公开(公告)号：US07362187B1

公开(公告)日：2008-04-22

申请号：US11259156

申请日：2005-10-25

申请人： Kang-Wei Lai ,  Greg Starr

发明人： Kang-Wei Lai ,  Greg Starr

IPC分类号： H03B27/00

CPC分类号： H03L7/0996 ,  H03K3/0322 ,  H03K5/135 ,  H03K5/15013 ,  H04L7/033

摘要： Circuits, methods, and apparatus that provide a sequential start-up of outputs of an oscillator following a power-up or restart. The outputs are gated by enable signals. These enable signals are derived sequentially, the first in a series being triggered by a specific output of the oscillator.

摘要翻译： 在上电或重新启动后提供振荡器输出的顺序启动的电路，方法和装置。 输出由使能信号选通。 这些使能信号依次导出，串联中的第一个由振荡器的特定输出触发。