公开(公告)号：US6106351A

公开(公告)日：2000-08-22

申请号：US146056

申请日：1998-09-02

申请人： Kanwal K. Raina ,  James J. Alwan

发明人： Kanwal K. Raina ,  James J. Alwan

IPC分类号： H01J9/02 ,  H01J1/02

CPC分类号： H01J9/025

摘要： The present disclosure describes microelectronic substrate assemblies, and methods for making and using such substrate assemblies in mechanical and chemical-mechanical planarizing processes. A microelectronic substrate assembly is fabricated in accordance with one aspect of the invention by forming a critical layer in a film stack on the substrate and manipulating the critical layer to have a low compression internal stress. The critical layer, more specifically, is a layer that is otherwise in a tensile state or a high compression state without being manipulated to control the internal stress in the critical layer to be in a low compression state. The stress in the critical layer can be manipulated by changing the chemistry, temperature or energy level of the process used to deposit or otherwise form the critical layer. The stress in the critical layer can also be manipulated using heat treatments and other processes. A critical layer composed of chromium, for example, can be manipulated by sputtering chromium in an argon/nitrogen atmosphere instead of solely an argon atmosphere to impart stress controlling elements (nitrogen molecules) into the chromium for producing a low compression chromium layer.

摘要翻译： 本公开描述了微电子衬底组件，以及用于在机械和化学机械平面化工艺中制造和使用这种衬底组件的方法。 根据本发明的一个方面通过在衬底上的膜堆叠中形成临界层并操纵临界层以具有低的压缩内部应力来制造微电子衬底组件。 更具体地说，临界层是否则处于拉伸状态或高压缩状态的层，而不被操纵以控制临界层中的内部应力处于低压缩状态。 临界层中的应力可以通过改变用于沉积或以其他方式形成临界层的方法的化学，温度或能量水平来操纵。 临界层中的应力也可以使用热处理和其他工艺进行操作。 例如，由铬构成的临界层可以通过在氩/氮气氛中溅射铬而不是仅仅氩气来操作，以将应力控制元素（氮分子）赋予铬以产生低压缩铬层。

公开(公告)号：US06211608B1

公开(公告)日：2001-04-03

申请号：US09096085

申请日：1998-06-11

申请人： Kanwal K. Raina ,  James J. Alwan

发明人： Kanwal K. Raina ,  James J. Alwan

IPC分类号： H01J102

CPC分类号： H01J1/3044 ,  H01J31/127 ,  H01J2201/30403

摘要： A field emission device is disclosed having a buffer layer positioned between an underlying cathode conductive layer and an overlying resistor layer. The buffer layer consists of substantially undoped amorphous silicon. Any pinhole defects or discontinuities that extend through the resistor layer terminate at the buffer layer, thereby preventing the problems otherwise caused by pinhole defects. In particular, the buffer layer prevents breakdown of the resistor layer, thereby reducing the possibility of short circuiting. The buffer layer further reduces the risk of delamination of various layers or other irregularities arising from subsequent processing steps. Also disclosed are methods of making and using the field emission device having the buffer layer.

摘要翻译： 公开了一种场致发射器件，其具有位于下面的阴极导电层和上覆电阻层之间的缓冲层。 缓冲层由基本上未掺杂的非晶硅组成。 延伸通过电阻层的任何针孔缺陷或不连续性终止于缓冲层，从而防止由针孔缺陷引起的问题。 特别地，缓冲层防止了电阻层的破坏，从而降低了短路的可能性。 缓冲层进一步降低了由后续处理步骤引起的各种层的分层或其它不规则的风险。 还公开了制造和使用具有缓冲层的场致发射器件的方法。

公开(公告)号：US06425791B1

公开(公告)日：2002-07-30

申请号：US09652746

申请日：2000-08-31

申请人： Kanwal K. Raina ,  James J. Alwan

发明人： Kanwal K. Raina ,  James J. Alwan

IPC分类号： H01J902

CPC分类号： H01J1/3044 ,  H01J31/127 ,  H01J2201/30403

摘要： A field emission device is disclosed having a buffer layer positioned between an underlying cathode conductive layer and an overlying resistor layer. The buffer layer consists of substantially undoped amorphous silicon. Any pinhole defects or discontinuities that extend through the resistor layer terminate at the buffer layer, thereby preventing the problems otherwise caused by pinhole defects. In particular, the buffer layer prevents breakdown of the resistor layer, thereby reducing the possibility of short circuiting. The buffer layer further reduces the risk of delamination of various layers or other irregularities arising from subsequent processing steps. Also disclosed are methods of making and using the field emission device having the buffer layer.

摘要翻译： 公开了一种场致发射器件，其具有位于下面的阴极导电层和上覆电阻层之间的缓冲层。 缓冲层由基本上未掺杂的非晶硅组成。 延伸通过电阻层的任何针孔缺陷或不连续性终止于缓冲层，从而防止由针孔缺陷引起的问题。 特别地，缓冲层防止了电阻层的破坏，从而降低了短路的可能性。 缓冲层进一步降低了由后续处理步骤引起的各种层的分层或其它不规则的风险。 还公开了制造和使用具有缓冲层的场致发射器件的方法。

公开(公告)号：US06239548B1

公开(公告)日：2001-05-29

申请号：US09643202

申请日：2000-08-21

申请人： Kanwal K. Raina ,  James J. Alwan

发明人： Kanwal K. Raina ,  James J. Alwan

IPC分类号： H01J162

CPC分类号： H01J9/025

摘要： The present disclosure describes microelectronic substrate assemblies, and methods for making and using such substrate assemblies in mechanical and chemical-mechanical planarizing processes. A microelectronic substrate assembly is fabricated in accordance with one aspect of the invention by forming a critical layer in a film stack on the substrate and manipulating the critical layer to have a low compression internal stress. The critical layer, more specifically, is a layer that is otherwise in a tensile state or a high compression state without being manipulated to control the internal stress in the critical layer to be in a low compression state. The stress in the critical layer can be manipulated by changing the chemistry, temperature or energy level of the process used to deposit or otherwise form the critical layer. The stress in the critical layer can also be manipulated using heat treatments and other processes. A critical layer composed of chromium, for example, can be manipulated by sputtering chromium in an argon/nitrogen atmosphere instead of solely an argon atmosphere to impart stress controlling elements (nitrogen molecules) into the chromium for producing a low compression chromium layer.

摘要翻译： 本公开描述了微电子衬底组件，以及用于在机械和化学机械平面化工艺中制造和使用这种衬底组件的方法。 根据本发明的一个方面通过在衬底上的膜堆叠中形成临界层并操纵临界层以具有低的压缩内部应力来制造微电子衬底组件。 更具体地说，临界层是否则处于拉伸状态或高压缩状态的层，而不被操纵以控制临界层中的内部应力处于低压缩状态。 临界层中的应力可以通过改变用于沉积或以其他方式形成临界层的方法的化学，温度或能量水平来操纵。 临界层中的应力也可以使用热处理和其他工艺进行操作。 例如，由铬构成的临界层可以通过在氩/氮气氛中溅射铬而不是仅仅氩气来操作，以将应力控制元素（氮分子）赋予铬以产生低压缩铬层。

公开(公告)号：US10650917B2

公开(公告)日：2020-05-12

申请号：US13540481

申请日：2012-07-02

申请人： James J. Alwan

发明人： James J. Alwan

IPC分类号： G06Q50/00 ,  G16H10/60

摘要： A system for associating a patient with a device may include a memory and a processor. The memory may be configured to store a plurality of orders and a set of parameters, wherein each of the plurality of orders comprises order attributes and each of the plurality of orders identifies one of a plurality of patients. The processor may be configured to receive the plurality of orders from an order entry system, receive the set of parameters from a device, correlate the set of parameters with an order of the plurality of orders based on the order attributes of the plurality of orders, associate the device with the patient identified by the order that correlates with the set of parameters, and provide, to the device, an indication of the patient associated with the device.

公开(公告)号：US07302043B2

公开(公告)日：2007-11-27

申请号：US11161237

申请日：2005-07-27

申请人： Scott H. Bloom ,  Harry Rieger ,  James J. Alwan

发明人： Scott H. Bloom ,  Harry Rieger ,  James J. Alwan

IPC分类号： G21K1/00

CPC分类号： G03F7/70916

摘要： A laser produced plasma device comprises a shutter assembly for mitigating the contaminating effects of debris generated by the plasma. In one embodiment, the shutter assembly includes a rotatable shutter having at least one aperture that provides a line-of-sight between a radiation source and an exit of the device during a first period of rotation of the shutter, and obstructs the line-of-sight between the radiation source and the exit during a second period of rotation. The shutter assembly in this embodiment also includes a motor configured to rotate the shutter to permit passage of the X-rays through the at least one aperture during the first period of rotation, and to thereafter rotate the shutter to obstruct passage of the debris through the at least one aperture during the second period of rotation.

摘要翻译： 激光产生的等离子体装置包括用于减轻由等离子体产生的碎片的污染影响的快门组件。 在一个实施例中，快门组件包括具有至少一个孔的可旋转快门，所述孔在快门的旋转的第一周期期间在辐射源和装置的出口之间提供视线，并且阻挡线 在第二旋转周期期间在辐射源和出口之间。 在该实施例中的快门组件还包括马达，其被配置为旋转快门以允许X射线在旋转的第一周期期间通过至少一个孔，并且此后旋转快门以阻止碎片通过 在第二旋转周期期间的至少一个孔。

公开(公告)号：US07224908B2

公开(公告)日：2007-05-29

申请号：US10045661

申请日：2001-10-23

申请人： James J. Alwan ,  Paul William Binun ,  Scott Harris Bloom ,  Victor J. Chan ,  Glenn Claude Hoiseth ,  Hugh Michael O'Brien, IV ,  Scott Platenberg ,  Werner Pyka ,  Raymond D. Rogers

发明人： James J. Alwan ,  Paul William Binun ,  Scott Harris Bloom ,  Victor J. Chan ,  Glenn Claude Hoiseth ,  Hugh Michael O'Brien, IV ,  Scott Platenberg ,  Werner Pyka ,  Raymond D. Rogers

IPC分类号： H04B10/04

CPC分类号： H04B10/0799 ,  H04B10/1123 ,  H04B10/674

摘要： Systems and methods for use with an optical communication beam are disclosed. The system allows the beam of light to operate at an adequate power level that provides a robust optical link while minimizing any safety risk to humans. The system calibrates and controls the gain for an avalanche photodiode detector (APD). A detector circuit is used to calibrate the APD. Once calibrated, the detector circuit further provides an electrical bias to the APD to process or condition the electrical signal to produce a detector output. The systems and methods disclosed herein attenuate the power level of an incoming communication beam to prevent oversaturation of an APD. The system further provides an alignment signal, which is effective over a wide dynamic range of incoming power levels.

摘要翻译： 公开了与光通信光束一起使用的系统和方法。 该系统允许光束以足够的功率水平运行，从而提供鲁棒的光学链路，同时最小化对人类的任何安全风险。 该系统校准并控制雪崩光电二极管检测器（APD）的增益。 检测器电路用于校准APD。 一旦被校准，检测器电路还向APD提供电偏压以处理或调节电信号以产生检测器输出。 本文公开的系统和方法衰减了入射通信波束的功率电平，以防止APD的过饱和。 该系统进一步提供对准信号，其在输入功率电平的宽动态范围内是有效的。

公开(公告)号：US06573023B2

公开(公告)日：2003-06-03

申请号：US09458758

申请日：1999-12-10

申请人： John Michiels ,  David Wells ,  Eric J. Knappenberger ,  James J. Alwan

发明人： John Michiels ,  David Wells ,  Eric J. Knappenberger ,  James J. Alwan

IPC分类号： G03C500

CPC分类号： G03F7/00 ,  G03F7/0015 ,  H01J9/025 ,  H01J2329/00 ,  H01L21/0271 ,  H01L21/3081 ,  H01L21/31144 ,  Y10S430/15

摘要： The present invention includes structures, lithographic mask forming solutions, mask forming methods, field emission display emitter mask forming methods, and methods of forming plural field emission display emitters. One aspect of the present invention provides a mask forming method including forming a masking layer over a surface of a substrate; screen printing plural masking particles over a surface of the masking layer; and removing at least portions of the masking layer using the masking particles as a mask. Another aspect of the present invention provides a method of forming plural field emission display emitters. This method includes forming a masking layer over an emitter substrate; screen printing a plurality of masking particles over the masking layer; removing portions of the masking layer intermediate the screen printed masking particles to form a plurality of masking elements; removing the masking particles from the masking elements; and removing portions of the emitter substrate to form plural emitters.

摘要翻译： 本发明包括结构，光刻掩模形成溶液，掩模形成方法，场致发射显示发射体掩模形成方法以及形成多场发射显示发射体的方法。 本发明的一个方面提供一种掩模形成方法，包括在衬底的表面上形成掩模层; 在掩模层的表面上方式印刷多个掩蔽粒子; 以及使用所述掩模颗粒作为掩模去除所述掩蔽层的至少一部分。 本发明的另一方面提供了一种形成多个场发射显示发射器的方法。 该方法包括在发射极基板上形成掩模层; 在掩模层上方丝网印刷多个掩模颗粒; 去除屏幕印刷掩模颗粒之间的掩模层的部分以形成多个掩模元件; 从掩蔽元件去除掩蔽粒子; 以及去除所述发射极基板的部分以形成多个发射极。

公开(公告)号：US06392334B1

公开(公告)日：2002-05-21

申请号：US09170705

申请日：1998-10-13

申请人： James J. Alwan

发明人： James J. Alwan

IPC分类号： H01J2970

CPC分类号： H01J9/261 ,  H01J29/86

摘要： A process for fabricating a flat panel display having a faceplate and a baseplate comprises creating an electric field between the faceplate and the baseplate to temporarily attract the faceplate to the baseplate and attaching the baseplate and faceplate to each other while the electric field is present. Capacitor(s) are formed on the faceplate and/or baseplate of a flat panel display such that a portion of the capacitor(s) is formed on the faceplate and is aligned with the pixel matrix and/or a portion of the capacitor(s) is formed on the baseplate and is aligned with the cathode member. The first and second portions of the capacitor(s) are energized to opposite polarity voltages, and an electric field is generated which attracts and aligns the two portions of the capacitor(s) to each other. When the two portions of the capacitor(s) are aligned and attracted to each other, the pixel matrix and cathode assembly are inherently aligned with each other. Once the faceplate and the baseplate are attached to each other, the capacitor(s) are de-energized and the electric field is dissipated.

摘要翻译： 一种用于制造具有面板和基板的平板显示器的方法包括在面板和基板之间产生电场，以在电场存在的同时暂时将面板吸引到基板并将基板和面板彼此附接。 电容器形成在平板显示器的面板和/或底板上，使得电容器的一部分形成在面板上并与像素矩阵和/或电容器的一部分 ）形成在基板上并与阴极构件对准。 电容器的第一部分和第二部分被激励到相反的极性电压，并且产生电场，其吸引并对齐电容器的两个部分彼此。 当电容器的两个部分彼此对准并被吸引时，像素矩阵和阴极组件彼此固有地对准。 一旦面板和底板相互连接，电容就被断电并且电场消散。

公开(公告)号：US6068878A

公开(公告)日：2000-05-30

申请号：US146731

申请日：1998-09-03

申请人： James J. Alwan

发明人： James J. Alwan

IPC分类号： B05D1/20 ,  H01J9/02

CPC分类号： H01J9/025 ,  B05D1/20

摘要： A method of forming a layer of particulates on a substrate includes fastening the substrate to a support and submerging at least a portion of the substrate in a liquid. The liquid has particulates suspended on an upper surface thereof. The submerged substrate is moved relative to the suspended particulates to form a layer of the particulates supported on the substrate. After the layer of particulates is formed on the substrate, the substrate is removed from the support.

摘要翻译： 在衬底上形成颗粒层的方法包括将衬底紧固到支撑件上，并将衬底的至少一部分浸没在液体中。 液体具有悬浮在其上表面上的颗粒。 浸没的基底相对于悬浮的微粒移动以形成支撑在基底上的微粒的层。 在基板上形成微粒子层之后，将基板从载体上移除。