Image formation apparatus
    4.
    发明授权
    Image formation apparatus 有权
    图像形成装置

    公开(公告)号:US09007605B2

    公开(公告)日:2015-04-14

    申请号:US13473804

    申请日:2012-05-17

    申请人: Kazuya Yamamoto

    发明人: Kazuya Yamamoto

    IPC分类号: G06F3/12 H04N1/00 G06F15/00

    摘要: An image formation apparatus includes an image reading control unit and a print control unit. The print control unit includes: a first communication control unit connected to the image reading control unit; and a power supply control unit configured to control power supply to the image reading control unit. The image reading control unit includes: a second communication control unit connected to the first communication control unit. When completing a process to transition to a power save mode in accordance with an instruction from the print control unit, the image reading control unit cuts off the communications through the second communication control unit. After sending the image reading control unit the instruction to transition to the power save mode, the print control unit detects the cutoff of the communications and then cuts off the power supply to the image reading control unit through the power supply control unit.

    摘要翻译: 图像形成装置包括图像读取控制单元和打印控制单元。 打印控制单元包括:连接到图像读取控制单元的第一通信控制单元; 以及电源控制单元,被配置为控制对所述图像读取控制单元的电力供应。 图像读取控制单元包括:连接到第一通信控制单元的第二通信控制单元。 当完成根据来自打印控制单元的指令转换到省电模式的处理时,图像读取控制单元通过第二通信控制单元切断通信。 在将图像读取控制单元发送到转换到省电模式的指令之后,打印控制单元检测通信的截止,然后通过电源控制单元切断对图像读取控制单元的电源。

    Sheet processing apparatus with pressing unit
    5.
    发明授权
    Sheet processing apparatus with pressing unit 有权
    带加压单元的片材处理设备

    公开(公告)号:US08870176B2

    公开(公告)日:2014-10-28

    申请号:US13371717

    申请日:2012-02-13

    申请人: Kazuya Yamamoto

    发明人: Kazuya Yamamoto

    摘要: A sheet processing apparatus includes: a stacking unit that stacks conveyed sheets; an aligning unit that aligns the sheets stacked on the stacking unit in a sheet conveying direction; a binding unit that moves along an end portion of a bundle of the sheets on a binding portion side and performs a binding process for the bundle of the sheets that have been aligned by the aligning unit; a pressing unit that presses the bundle of the sheets at the end portion thereof on the binding portion side; and an interlocking unit that moves the pressing unit in association with a motion of the binding unit.

    摘要翻译: 片材处理设备包括:堆叠所输送的片材的堆叠单元; 对准单元,其在片材输送方向上对齐堆叠单元上的片材; 捆绑单元,其沿着捆绑部分侧的纸张束的端部移动,并且对已经对准的对齐单元的纸张束执行装订处理; 按压单元,其在所述装订部分侧的端部处挤压所述片材束; 以及联锁单元,其与所述装订单元的运动相关联地移动所述按压单元。

    Detector circuit and semiconductor device using same
    6.
    发明授权
    Detector circuit and semiconductor device using same 有权
    检测电路和使用其的半导体器件

    公开(公告)号:US08558549B2

    公开(公告)日:2013-10-15

    申请号:US12941134

    申请日:2010-11-08

    IPC分类号: G01R31/00 G01R25/02

    摘要: A detector circuit for detecting degradation in the distortion characteristics of a power amplifier based on signals from both ends of a coupled line of a directional coupler. The detector circuit includes a phase shifter/attenuator for phase shifting and attenuating a signal from a coupled terminal of the coupled line, a differential amplifier for outputting difference between an output signal from the phase shifter/attenuator and a signal from the isolated terminal of the coupled line, a wave detector circuit for converting the difference into a DC signal, and a comparing circuit for determining whether the voltage level of the DC signal exceeds a predetermined level. When degradation in the distortion characteristics of the power amplifier arises, the phase shifter/attenuator phase shifts the signal from the coupled terminal and outputs a signal 180° out of phase with the signal from the isolated terminal.

    摘要翻译: 一种用于根据来自定向耦合器的耦合线的两端的信号来检测功率放大器的失真特性的劣化的检测器电路。 检测器电路包括用于相移和衰减来自耦合线的耦合端的信号的移相器/衰减器,用于输出来自移相器/衰减器的输出信号与来自该移相器/衰减器的隔离端的信号的差分放大器 耦合线,用于将差值转换为DC信号的波检测器电路,以及用于确定DC信号的电压电平是否超过预定电平的比较电路。 当功率放大器的失真特性出现降低时,移相器/衰减器将来自耦合端子的信号相移,并输出与隔离端子信号180°异相的信号。

    Power amplifier
    7.
    发明授权
    Power amplifier 有权
    功率放大器

    公开(公告)号:US08432227B2

    公开(公告)日:2013-04-30

    申请号:US13301955

    申请日:2011-11-22

    IPC分类号: H03F3/04

    摘要: A power amplifier includes: an amplifying element having a base into which input signals are inputted, a collector to which a collector voltage is applied, and an emitter; and a bias circuit supplying a bias current to the base of the amplifying element. The bias circuit includes a bias current lowering circuit which lowers the bias current when the collector voltage is lower than a prescribed threshold value.

    摘要翻译: 功率放大器包括:具有输入信号的基极的放大元件,施加集电极电压的集电极和发射极; 以及向放大元件的基极提供偏置电流的偏置电路。 偏置电路包括偏置电流降低电路,当集电极电压低于规定的阈值时,降低偏置电流。

    POWER AMPLIFIER
    9.
    发明申请
    POWER AMPLIFIER 有权
    功率放大器

    公开(公告)号:US20120062321A1

    公开(公告)日:2012-03-15

    申请号:US13079046

    申请日:2011-04-04

    IPC分类号: H03F3/20

    摘要: A power amplifier comprises: an amplifying transistor for amplifying an input signal; a reference voltage generating circuit which generates a reference voltage; a bias circuit generating a bias voltage based on the reference voltage and supplying the bias voltage to the amplifying transistor; and a booster elevating an enable voltage input from outside and outputting the enable voltage. The reference voltage generating circuit is turned ON/OFF in correspondence with an output voltage of the booster. The booster includes: an enable terminal to which the enable voltage is applied; a power source terminal connected to a power source; a transistor having a control electrode connected to the enable terminal, a first electrode connected to the power source terminal, and a second electrode that is grounded; and a FET resistor connected between the first electrode of the transistor and the power source terminal. A gate electrode of the FET resistor is open.

    摘要翻译: 功率放大器包括:放大晶体管,用于放大输入信号; 产生参考电压的基准电压产生电路; 偏置电路,基于所述参考电压产生偏置电压,并将所述偏置电压提供给所述放大晶体管; 并且升压器提升从外部输入的使能电压并输出使能电压。 参考电压产生电路对应于升压器的输出电压而导通/截止。 升压器包括:施加使能电压的使能端子; 连接到电源的电源端子; 具有连接到使能端子的控制电极的晶体管,连接到电源端子的第一电极和接地的第二电极; 以及连接在晶体管的第一电极和电源端子之间的FET电阻器。 FET电阻的栅电极断开。

    EMITTER-FOLLOWER TYPE BIAS CIRCUIT
    10.
    发明申请
    EMITTER-FOLLOWER TYPE BIAS CIRCUIT 有权
    发射器 - 型号偏置电路

    公开(公告)号:US20110187459A1

    公开(公告)日:2011-08-04

    申请号:US12875168

    申请日:2010-09-03

    IPC分类号: H03F3/16

    CPC分类号: H03F3/16

    摘要: An emitter-follower bias circuit supplying a bias voltage to the base of an amplification transistor includes: a depletion mode FET boosting a reference voltage; and an emitter-follower circuit generating the bias voltage in response to the reference voltage boosted by the depletion mode FET.

    摘要翻译: 向放大晶体管的基极提供偏置电压的射极跟随器偏置电路包括:耗尽型FET,提高参考电压; 以及射极跟随器电路,其响应于由耗尽型FET升压的参考电压而产生偏置电压。