公开(公告)号：US20120002498A1

公开(公告)日：2012-01-05

申请号：US13171849

申请日：2011-06-29

申请人： Toru Matsushita ,  Ken Matsubara ,  Takashi Iwase ,  Hidenori Mitani ,  Jun Setogawa ,  Fumiko Yamada

发明人： Toru Matsushita ,  Ken Matsubara ,  Takashi Iwase ,  Hidenori Mitani ,  Jun Setogawa ,  Fumiko Yamada

IPC分类号： G11C5/14

CPC分类号： G11C5/145 ,  G11C16/30

摘要： Operational stability of the nonvolatile memory in plural power supply voltage modes set up in advance corresponding to the power supply voltage level is realized. A nonvolatile memory is configured with a memory array, a charge pump, a distributor for selecting an output voltage of the charge pump, and a sequencer for controlling operation of the charge pump and the distributor. The nonvolatile memory is also provided with an analyzer which notifies the sequencer of a power supply voltage mode selectively specified among plural power supply voltage modes set up in advance corresponding to power supply voltage levels, and which detects mismatch between the power supply voltage mode notified to the sequencer and an actually supplied power supply voltage and limits the operation of the charge pump and the distributor with the use of the sequencer, based on the detection result. Accordingly, operational stability of the nonvolatile memory is realized.

摘要翻译： 实现了与电源电压电平相对应地设置的多个电源电压模式中的非易失性存储器的操作稳定性。 非易失性存储器配置有存储器阵列，电荷泵，用于选择电荷泵的输出电压的分配器，以及用于控制电荷泵和分配器的操作的定序器。 非易失性存储器还设置有分析器，其向定序器通知在与电源电压电平相对应地设置的多个电源电压模式中选择性地指定的电源电压模式，并且检测通知给 定序器和实际提供的电源电压，并且基于检测结果限制使用定序器的电荷泵和分配器的操作。 因此，实现了非易失性存储器的操作稳定性。

公开(公告)号：US07839039B2

公开(公告)日：2010-11-23

申请号：US11819280

申请日：2007-06-26

申请人： Ken Matsubara ,  Tomofumi Takahashi ,  Tetsuo Horie ,  Minoru Kitabayashi

发明人： Ken Matsubara ,  Tomofumi Takahashi ,  Tetsuo Horie ,  Minoru Kitabayashi

IPC分类号： H02K5/16 ,  H02K7/08 ,  H02K1/00

CPC分类号： H02K5/1732

摘要： A rotary shaft of a rotor including a magnet with a plurality of magnetic poles arranged at equal intervals on an outer circumference is supported at both ends by bearings. By externally fitting the inner ring of one bearing to the rotary shaft and holding it to be immovable in an axial direction and loosely fitting the outer ring of the bearing into the support hole and positioning it with belleville springs which are in contact resiliently with both sides, the rotary shaft and the rotor are supported so that they are movable in an axial direction within a movement amount of not greater than 2 mm according to a movement of the bearing caused against spring forces of the belleville springs.

摘要翻译： 包括具有在外周上等间隔排列的多个磁极的磁体的转子的旋转轴通过轴承支撑在两端。 通过将一个轴承的内圈外部安装到旋转轴上并将其保持在轴向方向上不可移动，并将轴承的外圈松动地装配到支撑孔中并将其定位成与两侧弹性接触的百叶窗弹簧 旋转轴和转子被支撑成使得它们可以根据由于贝氏弹簧的弹簧力引起的轴承的运动而在不大于2mm的移动量内沿轴向移动。

公开(公告)号：US20080277189A1

公开(公告)日：2008-11-13

申请号：US12117313

申请日：2008-05-08

申请人： Naotake KANDA ,  Ken Matsubara ,  Shinsuke Terada

发明人： Naotake KANDA ,  Ken Matsubara ,  Shinsuke Terada

IPC分类号： B62D5/04

CPC分类号： B62D5/0406 ,  B62D5/0409

摘要： It is an object of the present invention to provide an electric power steering apparatus to be small and compact.The control housing 30 is installed between the motor housing 25 of the electric motor 18 and the gear housing 22. The ECU controlling the electric motor 18 is accommodated in the accommodating room S formed within the control housing 30. The motor housing 25 accommodates the bus bar 45 connected to the coil 44 of the stator 36, and the resolver 40 detecting the rotational position of the rotor 35. The rosolver 40 is installed within the bus bar mounting member 262 in inner side of radial direction. The partition 52 is mounted on the control housing 30 and the fixing screw 81 is engaged with the insulating member 84 by the way that the fixing screw 81 is inserted into insulating member 84 from its bottom surface side.

摘要翻译： 本发明的目的是提供一种小型紧凑的电动助力转向装置。 控制壳体30安装在电动马达18的马达壳体25和齿轮壳体22之间。 控制电动机18的ECU容纳在形成在控制壳体30内的容纳室S.马达壳体25容纳与定子36的线圈44连接的母线45，旋转变压器40检测电动马达18的旋转位置 转子35。 滚筒40在径向内侧安装在汇流条安装构件262内。 分隔件52安装在控制壳体30上，并且固定螺钉81与绝缘构件84接合，固定螺钉81从底面侧插入到绝缘构件84中。

公开(公告)号：US20080066292A1

公开(公告)日：2008-03-20

申请号：US11979150

申请日：2007-10-31

申请人： Ken Matsubara

发明人： Ken Matsubara

IPC分类号： H02K15/00 ,  H02K15/02

CPC分类号： H02K15/02 ,  H02K15/16 ,  Y10T29/49009 ,  Y10T29/49012 ,  Y10T29/5313 ,  Y10T29/53143

摘要： An electric motor is equipped with a housing. The housing comprises a main housing body, with which a cylindrical part and a base are formed integrally in one piece, and an end member. An opening at a central part of the base is blocked by a cover. A first subassembly, in which the main housing body and a stator, and the like are assembled together, is held by a first holding member. A second subassembly, in which an output shaft, a rotor, the end member and the like are assembled together, is held via first and second end parts of the output shaft by a second holding member. By relative movement of the first and second holding members, the first and second subassemblies are assembled together.

公开(公告)号：US20070205041A1

公开(公告)日：2007-09-06

申请号：US11579902

申请日：2005-05-09

申请人： Katsutoshi Nishizaki ,  Shirou Nakano ,  Ken Matsubara ,  Toshiaki Oya ,  Yasuhiro Kamatani ,  Masahiko Sakamaki ,  Yoshikazu Kuromaru ,  Shigeki Nagase ,  Takayasu Yamazaki ,  Yasuhiro Saitou ,  Takeshi Ueda

发明人： Katsutoshi Nishizaki ,  Shirou Nakano ,  Ken Matsubara ,  Toshiaki Oya ,  Yasuhiro Kamatani ,  Masahiko Sakamaki ,  Yoshikazu Kuromaru ,  Shigeki Nagase ,  Takayasu Yamazaki ,  Yasuhiro Saitou ,  Takeshi Ueda

IPC分类号： G06F17/00

CPC分类号： B62D6/10 ,  B62D5/0472

摘要： An electric power steering system is provided which is capable of providing a favorable steering feeling without using compensation logics such as of inertia compensation and friction compensation. The electric power steering system includes road-noise suppression control means (213) for controlling a steering assist motor (9) in a manner to damp torque transmission in a higher frequency region representing road noises than a frequency region representing road information. A friction value of a steering mechanism (A) is decreased enough to allow the intrinsic vibrations of the steering mechanism (A) to appear. Rotor inertia of the steering assist motor (9) is set to a value small enough to allow the frequencies of the intrinsic vibrations to be present in the frequency region where the torque transmission is damped by the road-noise suppression control means (213).

摘要翻译： 提供一种电动助力转向系统，其能够在不使用惯性补偿和摩擦补偿等补偿逻辑的情况下提供良好的转向感。 电动助力转向系统包括道路噪声抑制控制装置，用于以比表示道路信息的频率区域更低的代表道路噪声的较高频率区域的方式来控制转向辅助电动机（9）。 转向机构（A）的摩擦值减小到足以使转向机构（A）的固有振动出现。 将转向辅助马达（9）的转子惯量设定为足够小的值，以使固有振动的频率存在于由道路噪声抑制控制装置（213）阻尼转矩传递的频率区域中。

公开(公告)号：US07235905B2

公开(公告)日：2007-06-26

申请号：US10998052

申请日：2004-11-29

申请人： Ken Matsubara ,  Yoshikazu Kuroumaru ,  Katsutoshi Nishizaki

发明人： Ken Matsubara ,  Yoshikazu Kuroumaru ,  Katsutoshi Nishizaki

IPC分类号： H02K5/15

CPC分类号： B62D5/0403 ,  B62D5/0412 ,  Y10T29/49009

摘要： An electric power steering assembly includes an electric motor, a reduction mechanism for reducing the speed of an output rotation of the electric motor, and a reduction-mechanism housing accommodating therein the reduction mechanism. The electric motor includes: an output shaft rotatably supported by the reduction-mechanism housing, a motor housing formed integrally with the reduction-mechanism housing, a rotor, and a stator assembly accommodated in an annular space defined between the rotor and the motor housing. When the stator assembly is assembled in the annular space via an opening at an end portion of the motor housing, a guided portion on an outside circumference of a stator yoke is guided by a guide portion on an inside circumference of the motor housing.

摘要翻译： 一种电动助力转向组件，包括电动机，用于减小电动机的输出转速的减速机构，以及容纳减速机构的减速机构壳体。 电动机包括：由减速机构壳体可旋转地支撑的输出轴，与减速机构壳体一体形成的电动机壳体，转子和容纳在限定在转子和电动机壳体之间的环形空间中的定子组件。 当定子组件经由电动机壳体的端部处的开口组装在环形空间中时，定子磁轭的外圆周上的被引导部分由马达壳体的内圆周上的引导部分引导。

公开(公告)号：US07095657B2

公开(公告)日：2006-08-22

申请号：US11224964

申请日：2005-09-14

申请人： Yoshinori Takase ,  Hideaki Kurata ,  Keiichi Yoshida ,  Ken Matsubara ,  Michitaro Kanamitsu ,  Shinji Yuasa

发明人： Yoshinori Takase ,  Hideaki Kurata ,  Keiichi Yoshida ,  Ken Matsubara ,  Michitaro Kanamitsu ,  Shinji Yuasa

IPC分类号： G11C7/10

CPC分类号： G11C16/16 ,  G11C16/0433 ,  G11C16/24 ,  G11C16/3436 ,  G11C16/344 ,  G11C16/3445 ,  G11C16/3459 ,  G11C2216/18

摘要： A nonvolatile semiconductor memory device capable of realizing optimized erasing operation in a memory array configuration in which a plurality of pages correspond to and are connected to each of a plurality of word lines and higher speed of the erasing operation. In a flash memory, the erasing operation is performed by an erasing method of erasing a plurality of pages arbitrarily selected in a lump. In a two-page erasing mode, page erasure, page pre-erasure verification, page rewriting process, page pre-rewriting verification, and page upper end determining process are performed in order. The method realizes, particularly, (1) suppression of the number of erase verification times to the minimum by performing erase verification only on arbitrary one even-numbered or odd-numbered page in the pages to be erased in consideration of variations in the erasing characteristic, and (2) prevention of erroneous determination of the upper end of erasure since it is unnecessary to set a memory cell to be rewritten every rewrite verification by continuously executing the rewriting process page by page.

摘要翻译： 一种非易失性半导体存储器件，其能够在存储器阵列配置中实现优化的擦除操作，其中多个页面对应于并连接到多个字线中的每一个并且更高的擦除操作速度。 在闪速存储器中，通过擦除多个任意选择的多个页面的擦除方法进行擦除操作。 在两页擦除模式中，按顺序执行页擦除，页预擦除验证，页重写处理，页预重写验证和页上限确定处理。 该方法特别地实现（1）通过仅在擦除页面中的任意一个偶数页或奇数页上执行擦除验证，以便考虑到擦除特性的变化来将擦除验证次数抑制到最小 ，以及（2）防止擦除上端的错误判断，因为不必每次重写验证来设置要重写的存储单元，通过逐页连续执行重写处理。

公开(公告)号：US06958940B2

公开(公告)日：2005-10-25

申请号：US10499667

申请日：2002-02-28

申请人： Yoshinori Takase ,  Hideaki Kurata ,  Keiichi Yoshida ,  Ken Matsubara ,  Michitaro Kanamitsu ,  Shinji Yuasa

发明人： Yoshinori Takase ,  Hideaki Kurata ,  Keiichi Yoshida ,  Ken Matsubara ,  Michitaro Kanamitsu ,  Shinji Yuasa

IPC分类号： G11C16/04 ,  G11C16/24 ,  G11C16/34

CPC分类号： G11C16/16 ,  G11C16/0433 ,  G11C16/24 ,  G11C16/3436 ,  G11C16/344 ,  G11C16/3445 ,  G11C16/3459 ,  G11C2216/18

摘要： A nonvolatile semiconductor memory device capable of realizing optimized erasing operation in a memory array configuration in which a plurality of pages correspond to and are connected to each of a plurality of word lines and higher speed of the erasing operation. In a flash memory, the erasing operation is performed by an erasing method of erasing a plurality of pages arbitrarily selected in a lump. In a two-page erasing mode, page erasure, page pre-erasure verification, page rewriting process, page pre-rewriting verification, and page upper end determining process are performed in order. The method realizes, particularly, (1) suppression of the number of erase verification times to the minimum by performing erase verification only on arbitrary one even-numbered or odd-numbered page in the pages to be erased in consideration of variations in the erasing characteristic, and (2) prevention of erroneous determination of the upper end of erasure since it is unnecessary to set a memory cell to be rewritten every rewrite verification by continuously executing the rewriting process page by page.

摘要翻译： 一种非易失性半导体存储器件，其能够在存储器阵列配置中实现优化的擦除操作，其中多个页面对应于并连接到多个字线中的每一个并且更高的擦除操作速度。 在闪速存储器中，通过擦除多个任意选择的多个页面的擦除方法进行擦除操作。 在两页擦除模式中，按顺序执行页擦除，页预擦除验证，页重写处理，页预重写验证和页上限确定处理。 该方法特别地实现（1）通过仅在擦除页面中的任意一个偶数页或奇数页上执行擦除验证，以便考虑到擦除特性的变化来将擦除验证次数抑制到最小 ，以及（2）防止擦除上端的错误判断，因为不必每次重写验证来设置要重写的存储单元，通过逐页连续执行重写处理。

公开(公告)号：US06661555B2

公开(公告)日：2003-12-09

申请号：US10166393

申请日：2002-06-11

申请人： Tomohiko Masuda ,  Ken Matsubara ,  Isao Doi ,  Yasuyuki Hiromoto

发明人： Tomohiko Masuda ,  Ken Matsubara ,  Isao Doi ,  Yasuyuki Hiromoto

IPC分类号： G02F107

CPC分类号： G02F1/0316 ,  G02F1/0322 ,  G02F1/0551

摘要： A light shutter device including a group of light shutter elements 31a, 31b 31c and 31d formed on a light shutter chip 30 made of PLZT has a construction in which an electrode gap is set wider in a element in which an electric field acts more strongly to equalize half wavelength voltages of elements almost to the same level since electric fields acting on the elements are different in strength from each other even under a prescribed voltage applied between a common electrode 32 and each of individual electrodes 33. An electrode gap of an element 31c having a weaker electric field is comparatively set narrower, whereas an electrode gap of an element 31d having a stronger electric field is set comparatively wider. Moreover, a shape of electrodes of each element are altered so as to make half wavelength voltages of elements almost equal.

摘要翻译： 包括形成在由PLZT制成的光快门芯片30上的一组光快门元件31a，31b 31c和31d的光快门装置具有这样的结构，其中，电场间隙在电场作用更强烈的元件中被设定得更宽， 即使在施加在公共电极32和各个电极33之间的规定电压下，作用在元件上的电场的强度彼此不同，元件的半波长电压几乎达到同一水平。均匀元件31c的电极间隙 具有较弱电场的电场相对较窄，而具有较强电场的元件31d的电极间隙设定得比较宽。 此外，改变每个元件的电极形状，使得元件的半波长电压几乎相等。

公开(公告)号：US06333871B1

公开(公告)日：2001-12-25

申请号：US09539634

申请日：2000-03-30

申请人： Tetsuya Tsujikawa ,  Atsushi Nozoe ,  Michitaro Kanamitsu ,  Shoji Kubono ,  Eiji Yamamoto ,  Ken Matsubara

发明人： Tetsuya Tsujikawa ,  Atsushi Nozoe ,  Michitaro Kanamitsu ,  Shoji Kubono ,  Eiji Yamamoto ,  Ken Matsubara

IPC分类号： G11C1604

CPC分类号： G11C16/0483 ,  G11C11/5621 ,  G11C11/5628 ,  G11C11/5635 ,  G11C11/5642 ,  G11C16/10 ,  G11C16/3463 ,  G11C2211/5642

摘要： Externally supplied program data is latched into data latch circuits DLL and DLR. A judgment is made as to whether or not the latched program data corresponds to any threshold value of multi-levels every time each of plural programing operations is carried out. The program control information corresponding to the judgment result is latched into a sense latch circuit SL. Based upon the latched program control information, the programing operation for setting threshold voltages having multi-levels to a memory cell is carried out in a stepwise manner. Even when the programing operation is ended, the externally supplied program data is left in the data latch circuit. Even when the programing operation of the memory cell is retried due to the overprograming condition, the program data is no longer required to be again received from the external device.

摘要翻译： 外部提供的程序数据被锁存到数据锁存电路DLL和DLR中。 在执行多个编程操作的每一次时，判定所锁存的程序数据是否对应于多级的任何阈值。 与判断结果相对应的程序控制信息被锁存在读出锁存电路SL中。 基于锁存的程序控制信息，以逐步的方式执行用于将具有多级的阈值电压设置到存储器单元的编程操作。 即使编程操作结束，外部提供的程序数据也留在数据锁存电路中。 即使由于过度编程条件而重试存储器单元的编程操作，也不再需要再次从外部设备接收程序数据。