Loading device and electronic equipment system
    3.
    发明授权
    Loading device and electronic equipment system 失效
    装载和电子设备系统

    公开(公告)号:US06334006B1

    公开(公告)日:2001-12-25

    申请号:US09200931

    申请日:1998-11-30

    Applicant: Ken Tanabe

    Inventor: Ken Tanabe

    CPC classification number: G11B33/126 G02B6/43 G02B6/4452 G11B33/128 H01R13/641

    Abstract: An electronic equipment system includes an electronic device, a loading device for loading into and unloading from the electronic device, a light emitting section in the electronic device corresponding to the loading device, and an optical fiber corresponding to the loading device. The optical fiber transmits light from the light emitting section from a first end to a second end of the optical fiber.

    Abstract translation: 一种电子设备系统,包括电子装置,用于装载和卸载电子装置的装载装置,对应于装载装置的电子装置中的发光部分和对应于装载装置的光纤。 光纤将光从光发射部分的光纤的第一端透射到第二端。

    Debugging support device, debugging support method, and program thereof
    4.
    发明授权
    Debugging support device, debugging support method, and program thereof 有权
    调试支持设备,调试支持方法及其程序

    公开(公告)号:US08347274B2

    公开(公告)日:2013-01-01

    申请号:US12558716

    申请日:2009-09-14

    CPC classification number: G06F11/261 G06F11/362

    Abstract: A debugging support device includes: a plurality of CPU simulating units which simulates the operations of a plurality of CPUs which executes programs in parallel; a memory simulating unit of a memory to be shared by the plurality of CPUs; an event monitoring unit that detects a predetermined event occurring between each CPU simulating unit and the memory simulating unit; and a state judging unit that judges whether the state of the occurred predetermined event matches a predetermined condition and, if the predetermined condition is matched, records history information related to the state of the memory simulating unit.

    Abstract translation: 调试支持装置包括:多个CPU模拟单元,其模拟并行执行程序的多个CPU的操作; 由所述多个CPU共享的存储器的存储器模拟单元; 事件监视单元,其检测在每个CPU模拟单元和所述存储器模拟单元之间发生的预定事件; 以及状态判断单元,判断所发生的预定事件的状态是否符合预定条件,并且如果所述预定条件匹配,则记录与所述存储器模拟单元的状态相关的历史信息。

    DEBUGGING SUPPORT DEVICE, DEBUGGING SUPPORT METHOD, AND PROGRAM THEREOF
    5.
    发明申请
    DEBUGGING SUPPORT DEVICE, DEBUGGING SUPPORT METHOD, AND PROGRAM THEREOF 有权
    调试支持设备,调试支持方法及其程序

    公开(公告)号:US20100175051A1

    公开(公告)日:2010-07-08

    申请号:US12558716

    申请日:2009-09-14

    CPC classification number: G06F11/261 G06F11/362

    Abstract: A debugging support device includes: a plurality of CPU simulating units which simulates the operations of a plurality of CPUs which executes programs in parallel; a memory simulating unit of a memory to be shared by the plurality of CPUs; an event monitoring unit that detects a predetermined event occurring between each CPU simulating unit and the memory simulating unit; and a state judging unit that judges whether the state of the occurred predetermined event matches a predetermined condition and, if the predetermined condition is matched, records history information related to the state of the memory simulating unit.

    Abstract translation: 调试支持装置包括:多个CPU模拟单元,其模拟并行执行程序的多个CPU的操作; 由所述多个CPU共享的存储器的存储器模拟单元; 事件监视单元,其检测在每个CPU模拟单元和所述存储器模拟单元之间发生的预定事件; 以及状态判断单元,判断所发生的预定事件的状态是否符合预定条件,并且如果所述预定条件匹配,则记录与所述存储器模拟单元的状态相关的历史信息。

    PROGRAM PARALLELIZATION SUPPORTING APPARATUS AND PROGRAM PARALLELIZATION SUPPORTING METHOD
    6.
    发明申请
    PROGRAM PARALLELIZATION SUPPORTING APPARATUS AND PROGRAM PARALLELIZATION SUPPORTING METHOD 审中-公开
    支持方案的程序并行化和程序并行化支持方法

    公开(公告)号:US20090138862A1

    公开(公告)日:2009-05-28

    申请号:US12211420

    申请日:2008-09-16

    CPC classification number: G06F8/456

    Abstract: A program parallelization supporting apparatus determines a determinacy in at least one dependency relationship of a data dependency, a control dependency and a pointer dependency in a program, extracts a critical path in the program, and extracts a processing instruction which exists on the critical path and has a non-deterministic determinacy in the dependency relationship. Furthermore, if a process related to a path of the extracted non-deterministic processing instruction is parallelized and the path of the non-deterministic processing instruction is deleted, the program parallelization supporting apparatus outputs parallelization labor hour information depending on the number of dependency relationships disturbing the parallelization and parallelization effect information depending on the number of processing instructions which are shortened by the parallelization.

    Abstract translation: 程序并行化支持装置确定程序中数据依赖性,控制依赖性和指针相关性的至少一个依赖关系的确定性,提取程序中的关键路径,并提取存在于关键路径上的处理指令, 在依赖关系中具有非确定性的确定性。 此外,如果与所提取的非确定性处理指令的路径相关的处理被并行并且删除非确定性处理指令的路径,则程序并行化支持装置根据依赖关系的数量来输出并行劳动时间信息 并行化和并行效应信息取决于通过并行化缩短的处理指令的数量。

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