3-D integrated circuit lateral heat dissipation
    4.
    发明授权
    3-D integrated circuit lateral heat dissipation 有权
    3-D集成电路横向散热

    公开(公告)号:US08502373B2

    公开(公告)日:2013-08-06

    申请号:US12115076

    申请日:2008-05-05

    IPC分类号: H01L23/34

    摘要: By filling an air gap between tiers of a stacked IC device with a thermally conductive material, heat generated at one or more locations within one of the tiers can be laterally displaced. The lateral displacement of the heat can be along the full length of the tier and the thermal material can be electrically insulating. Through silicon-vias (TSVs) can be constructed at certain locations to assist in heat dissipation away from thermally troubled locations.

    摘要翻译: 通过在层叠的IC器件的层之间填充导热材料,在一个层内的一个或多个位置处产生的热可以横向移位。 热的横向位移可以沿着层的整个长度,并且热材料可以是电绝缘的。 通过硅通孔(TSV)可以在某些位置构建,以帮助散热的位置。

    Via First Plus Via Last Technique for IC Interconnect
    7.
    发明申请
    Via First Plus Via Last Technique for IC Interconnect 有权
    Via First Plus通过IC互连的最后技术

    公开(公告)号:US20100261310A1

    公开(公告)日:2010-10-14

    申请号:US12822000

    申请日:2010-06-23

    IPC分类号: H01L21/50 H01L21/768

    摘要: A multi-tiered IC device contains a first die including a substrate with a first and second set of vias. The first set of vias extends from one side of the substrate, and the second set of vias extend from an opposite side of the substrate. Both sets of vias are coupled together. The first set of vias are physically smaller than the second set of vias. The first set of vias are produced prior to circuitry on the die, and the second set of vias are produced after circuitry on the die. A second die having a set of interconnects is stacked relative to the first die in which the interconnects couple to the first set of vias.

    摘要翻译: 多层IC器件包含第一裸片,其包括具有第一组和第二组通孔的衬底。 第一组通孔从衬底的一侧延伸,并且第二组通孔从衬底的相对侧延伸。 两组通孔耦合在一起。 第一组通孔在物理上小于第二组通孔。 第一组通孔在芯片上的电路之前产生,并且第二组通孔在芯片上的电路之后产生。 具有一组互连件的第二管芯相对于第一管芯堆叠,其中互连件耦合到第一组通孔。

    IC Interconnect
    9.
    发明申请
    IC Interconnect 有权
    IC互连

    公开(公告)号:US20110042829A1

    公开(公告)日:2011-02-24

    申请号:US12938396

    申请日:2010-11-03

    IPC分类号: H01L23/538

    摘要: A multi-tiered IC device contains a first die including a substrate with a first and second set of vias. The first set of vias extends from one side of the substrate, and the second set of vias extend from an opposite side of the substrate. Both sets of vias are coupled together. The first set of vias are physically smaller than the second set of vias. A second die having a set of interconnects is stacked relative to the first die in which the interconnects couple to the first set of vias.

    摘要翻译: 多层IC器件包含第一裸片,其包括具有第一组和第二组通孔的衬底。 第一组通孔从衬底的一侧延伸,并且第二组通孔从衬底的相对侧延伸。 两组通孔耦合在一起。 第一组通孔在物理上小于第二组通孔。 具有一组互连件的第二管芯相对于第一管芯堆叠,其中互连件耦合到第一组通孔。

    IC interconnect
    10.
    发明授权
    IC interconnect 有权
    IC互连

    公开(公告)号:US08076768B2

    公开(公告)日:2011-12-13

    申请号:US12938396

    申请日:2010-11-03

    IPC分类号: H01L23/02

    摘要: A multi-tiered IC device contains a first die including a substrate with a first and second set of vias. The first set of vias extends from one side of the substrate, and the second set of vias extend from an opposite side of the substrate. Both sets of vias are coupled together. The first set of vias are physically smaller than the second set of vias. A second die having a set of interconnects is stacked relative to the first die in which the interconnects couple to the first set of vias.

    摘要翻译: 多层IC器件包含第一裸片,其包括具有第一组和第二组通孔的衬底。 第一组通孔从衬底的一侧延伸,并且第二组通孔从衬底的相对侧延伸。 两组通孔耦合在一起。 第一组通孔在物理上小于第二组通孔。 具有一组互连件的第二管芯相对于第一管芯堆叠,其中互连件耦合到第一组通孔。