Abstract:
The specification describes a gallium aluminum arsenide-gallium arsenide-germanium solar cell and fabrication process therefor wherein the deposition of a layer of gallium aluminum arsenide establishes a first PN junction in the GaAs of one bandgap energy on one side of a gallium arsenide substrate, and the deposition of a layer of germanium establishes a second PN junction in Ge of a different bandgap energy on the other side of the GaAs substrate. The two PN junctions are responsive respectively to different wavelength ranges of solar energy to thus enhance the power output capability of a single wafer (substrate) solar cell. Utilization of the Group IV element germanium, as contrasted to compound semiconductors, simplifies the process control requirements relative to known prior art compound semiconductor processes, and germanium also provides a good crystal lattice match with gallium arsenide and thereby maximizes process yields. This latter feature also minimizes losses caused by the crystal defects associated with the interface between two semiconductors.
Abstract:
The specification describes a gallium aluminum arsenide-gallium arsenide-germanium solar cell and fabrication process therefor wherein the deposition of a layer of gallium aluminum arsenide establishes a first PN junction in the GaAs of one bandgap energy on one side of a gallium arsenide substrate, and the deposition of a layer of germanium establishes a second PN junction in Ge of a different bandgap energy on the other side of the GaAs substrate. The two PN junctions are responsive respectively to different wavelength ranges of solar energy to thus enhance the power output capability of a single wafer (substrate) solar cell. Utilization of the Group IV element germanium, as contrasted to compound semiconductors, simplifies the process control requirements relative to known prior art compound semiconductor processes, and germanium also provides a good crystal lattice match with gallium arsenide and thereby maximizes process yields. This latter feature also minimizes losses caused by the crystal defects associated with the interface between two semiconductors.
Abstract:
A thin passivating layer (14) of CdTe is formed on a layer of photoconductive HgCdTe (4) by means of electrochemical deposition. The photoconductive layer (4) is used as a cathode. A first anode (26) is fabricated of tellurium and a second anode (28) is fabricated of an inert substance such as graphite. An electrolyte (30) comprises an aqueous solution of CdSO.sub.4 and unsaturated TeO.sub.2. Alternatively, electrolyte (30) can be saturated with TeO.sub.2, in which case a first anode is fabricated of an inert substance, and an optional second anode is fabricated of cadmium. After purifying the cathode (1) and the electrolyte (30), cadmium and tellurium are simultaneously deposited upon cathode (1). Stoichiometric balance is maintained to maximize the resistivity of the passivating CdTe layer (14). This is accomplished by regulating the deposition voltage of cathode (1) with respect to a saturated calomel electrode (22). In a first embodiment, an n-type region (16) is formed in the p-type photoconductive layer (4) subsequent to electrochemical deposition of the passivating CdTe layer (14). In a second embodiment, the n-type region (16) is formed in the p-type layer (4) prior to electrochemical deposition of the CdTe passivating layer (14).