公开(公告)号：US20050014316A1

公开(公告)日：2005-01-20

申请号：US10917394

申请日：2004-08-13

申请人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： G02F1/1362 ,  H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/49 ,  H01L29/786 ,  H01L21/30 ,  H01L21/46 ,  H01L21/00

CPC分类号： H01L21/02667 ,  G02F1/13454 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02686 ,  H01L21/2022 ,  H01L27/12 ,  H01L27/1285 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78621 ,  H01L29/78675

摘要： A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

摘要翻译： 一种制造薄膜晶体管的方法，该方法是通过设定用于使基板上形成的活性层结晶的热处理的温度不会使基板变形，并且以不同于 热处理，以及通过在基板上形成吸热膜，半导体膜，栅极绝缘膜和栅电极而制备的半导体器件，所述吸热膜设置在与半导体膜基本对应的区域内。

公开(公告)号：US06790714B2

公开(公告)日：2004-09-14

申请号：US09813866

申请日：2001-03-22

申请人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： H01L2100

CPC分类号： H01L21/02667 ,  G02F1/13454 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02686 ,  H01L21/2022 ,  H01L27/12 ,  H01L27/1285 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78621 ,  H01L29/78675

摘要： A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

摘要翻译： 一种制造薄膜晶体管的方法，该方法是通过设定用于使基板上形成的活性层结晶的热处理的温度不会使基板变形，并且以不同于 热处理，以及通过在基板上形成吸热膜，半导体膜，栅极绝缘膜和栅电极而制备的半导体器件，所述吸热膜设置在与半导体膜基本对应的区域内。

公开(公告)号：US5771110A

公开(公告)日：1998-06-23

申请号：US677424

申请日：1996-07-02

申请人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： G02F1/1362 ,  H01L21/20 ,  H01L21/336 ,  H01L21/77 ,  H01L21/84 ,  H01L27/12 ,  H01L29/49 ,  H01L29/786 ,  H01L27/105

CPC分类号： G02F1/13454 ,  H01L21/2022 ,  H01L27/12 ,  H01L27/1281 ,  H01L27/1285 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78621 ,  H01L29/78648 ,  H01L29/78675

摘要： A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

摘要翻译： 一种制造薄膜晶体管的方法，该方法是通过设定用于使基板上形成的活性层结晶的热处理的温度不会使基板变形，并且以不同于 热处理，以及通过在基板上形成吸热膜，半导体膜，栅极绝缘膜和栅电极而制备的半导体器件，所述吸热膜设置在与半导体膜基本对应的区域内。

公开(公告)号：US07084052B2

公开(公告)日：2006-08-01

申请号：US10917394

申请日：2004-08-13

申请人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： H01L21/425

CPC分类号： H01L21/02667 ,  G02F1/13454 ,  H01L21/02422 ,  H01L21/02488 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/02686 ,  H01L21/2022 ,  H01L27/12 ,  H01L27/1285 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78621 ,  H01L29/78675

摘要： A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

公开(公告)号：US06500704B1

公开(公告)日：2002-12-31

申请号：US09056604

申请日：1998-04-08

申请人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

发明人： Kiichi Hirano ,  Naoya Sotani ,  Toshifumi Yamaji ,  Yoshihiro Morimoto ,  Kiyoshi Yoneda

IPC分类号： H01L2184

CPC分类号： H01L21/02686 ,  G02F1/13454 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/2022 ,  H01L27/12 ,  H01L27/1281 ,  H01L27/1285 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78603 ,  H01L29/78621 ,  H01L29/78648 ,  H01L29/78675

摘要： A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.

摘要翻译： 一种制造薄膜晶体管的方法，该方法是通过设定用于使基板上形成的活性层结晶的热处理的温度不会使基板变形，并且以不同于 热处理，以及通过在基板上形成吸热膜，半导体膜，栅极绝缘膜和栅电极而制备的半导体器件，所述吸热膜设置在与半导体膜基本对应的区域内。

公开(公告)号：US07078733B2

公开(公告)日：2006-07-18

申请号：US10383058

申请日：2003-03-07

申请人： Naoya Sotani ,  Koji Suzuki ,  Yoshio Miyai

发明人： Naoya Sotani ,  Koji Suzuki ,  Yoshio Miyai

IPC分类号： H01L33/00 ,  H01J1/62

CPC分类号： H01L27/12 ,  H01B1/023 ,  H01B1/026 ,  H01L21/2855 ,  H01L21/32051 ,  H01L23/53219 ,  H01L27/3244 ,  H01L2924/0002 ,  H01L2924/00

摘要： A layered structure of wire(s) comprising a wiring layer made of a low resistance metal containing aluminum, copper or silver; and an alloy layer made of an intermediate phase containing the low resistance metal and a refractory metal. The refractory metal is molybdenum. There is also formed a layered structure of wire(s) made of an aluminum alloy containing a lanthanoid, wherein a number average crystal grain size is 16.9 nm or more. Crystal grain size may be larger than a mean free path of electrons to provide a layered structure of wire(s) with a reduced resistance.

摘要翻译： 一种线的分层结构，包括由含有铝，铜或银的低电阻金属制成的布线层; 以及由含有低电阻金属和难熔金属的中间相制成的合金层。 难熔金属是钼。 还形成由含有镧系元素的铝合金制成的线的层叠结构，其中数均晶粒尺寸为16.9nm以上。 晶粒尺寸可能大于电子的平均自由程，以提供电阻降低的线的分层结构。

公开(公告)号：US07499121B2

公开(公告)日：2009-03-03

申请号：US11314955

申请日：2005-12-22

申请人： Yukihiro Noguchi ,  Shoichiro Matsumoto ,  Naoya Sotani ,  Daisuke Ide ,  Yasutaka Kobayashi ,  Yoshiyuki Ishizuka ,  Isao Hasegawa

发明人： Yukihiro Noguchi ,  Shoichiro Matsumoto ,  Naoya Sotani ,  Daisuke Ide ,  Yasutaka Kobayashi ,  Yoshiyuki Ishizuka ,  Isao Hasegawa

IPC分类号： G02F1/136 ,  G02F1/1333

CPC分类号： G02F1/13454 ,  G02F1/136209 ,  G02F2001/133388

摘要： A display capable of inhibiting a transistor from an instable operation resulting from fluctuation of the potential of a shielding film and suppressing occurrence of a malfunction is provided. This display comprises a first region including a first transistor, a first shielding film provided on the first region, arranged on a region corresponding to the first transistor and supplied with a first potential, a second region including a second transistor and a second shielding film provided on the second region, arranged on a region corresponding to the second transistor and supplied with a second potential.

摘要翻译： 提供了能够抑制晶体管由于屏蔽膜的电位波动导致的不稳定操作并且抑制故障发生的显示器。 该显示器包括：第一区域，包括第一晶体管，设置在第一区域上的第一屏蔽膜，布置在与第一晶体管对应的区域中并被提供有第一电位;第二区域，包括第二晶体管和第二屏蔽膜， 在第二区域上布置在与第二晶体管相对应的区域上并且被提供第二电位。

公开(公告)号：US20090320895A1

公开(公告)日：2009-12-31

申请号：US12439247

申请日：2007-08-28

申请人： Toshio Yagiura ,  Naoya Sotani

发明人： Toshio Yagiura ,  Naoya Sotani

IPC分类号： H01L31/042

CPC分类号： H01L31/0465 ,  Y02E10/50

摘要： In a thin film solar cell module, a photovoltaic layer and a sealing layer 16 are sequentially disposed on a transparent substrate 11, the photovoltaic layer formed by connecting in series multiple photovoltaic elements each formed by sequentially stacking a transparent conductive film 12, photovoltaic conversion layers, and a rear surface electrode 15. Meanwhile, in a region where the rear surface electrodes 15 of the photovoltaic elements adjacent to each other are electrically separated, a metal film 18 is provided on a surface of the transparent conductive film 12 at a side of the sealing layer 16.

摘要翻译： 在薄膜太阳能电池模块中，光电层和密封层16依次设置在透明基板11上，通过串联连接多个光电元件形成的光电层，每个光电元件各自通过依次层叠透明导电膜12，光电转换层 和背面电极15.同时，在彼此相邻的光电元件的背面电极15电分离的区域中，金属膜18设置在透明导电膜12的一侧的表面上 密封层16。

公开(公告)号：US20060250592A1

公开(公告)日：2006-11-09

申请号：US11314955

申请日：2005-12-22

申请人： Yukihiro Noguchi ,  Shoichiro Matsumoto ,  Naoya Sotani ,  Daisuke Ide ,  Yasutaka Kobayashi ,  Yoshiyuki Ishizuka ,  Isao Hasegawa

发明人： Yukihiro Noguchi ,  Shoichiro Matsumoto ,  Naoya Sotani ,  Daisuke Ide ,  Yasutaka Kobayashi ,  Yoshiyuki Ishizuka ,  Isao Hasegawa

IPC分类号： G03B27/42

CPC分类号： G02F1/13454 ,  G02F1/136209 ,  G02F2001/133388

摘要： A display capable of inhibiting a transistor from an instable operation resulting from fluctuation of the potential of a shielding film and suppressing occurrence of a malfunction is provided. This display comprises a first region including a first transistor, a first shielding film provided on the first region, arranged on a region corresponding to the first transistor and supplied with a first potential, a second region including a second transistor and a second shielding film provided on the second region, arranged on a region corresponding to the second transistor and supplied with a second potential.

摘要翻译： 提供了能够抑制晶体管由于屏蔽膜的电位波动导致的不稳定操作并且抑制故障发生的显示器。 该显示器包括：第一区域，包括第一晶体管，设置在第一区域上的第一屏蔽膜，布置在与第一晶体管对应的区域中并被提供有第一电位;第二区域，包括第二晶体管和第二屏蔽膜， 在第二区域上布置在与第二晶体管相对应的区域上并且被提供第二电位。

公开(公告)号：US06281057B1

公开(公告)日：2001-08-28

申请号：US09004779

申请日：1998-01-09

申请人： Yoichiro Aya ,  Tomoyuki Nouda ,  Yasuo Nakahara ,  Naoya Sotani ,  Hisashi Abe ,  Hiroki Hamada

发明人： Yoichiro Aya ,  Tomoyuki Nouda ,  Yasuo Nakahara ,  Naoya Sotani ,  Hisashi Abe ,  Hiroki Hamada

IPC分类号： H01L2184

摘要： A method is obtained of manufacturing a semiconductor device including a semiconductor layer with high field-effect mobility. According to the semiconductor device manufacturing method, a semiconductor layer is formed on a substrate and then the semiconductor layer is irradiated with high energy beam. Then, a heat treatment is provided under a temperature condition capable of reducing the surface roughness of the semiconductor layer. The radiation of high energy beam toward the semiconductor layer improves the crystalinity of the semiconductor layer and the subsequent heat treatment reduces the surface roughness of the semiconductor layer to enhance the field-effect mobility of the semiconductor layer.