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公开(公告)号：US20050014316A1
公开(公告)日：2005-01-20
申请号：US10917394
申请日：2004-08-13
IPC分类号： G02F1/1362 , H01L21/20 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/49 , H01L29/786 , H01L21/30 , H01L21/46 , H01L21/00
CPC分类号： H01L21/02667 , G02F1/13454 , H01L21/02422 , H01L21/02488 , H01L21/02532 , H01L21/02595 , H01L21/0262 , H01L21/02686 , H01L21/2022 , H01L27/12 , H01L27/1285 , H01L29/4908 , H01L29/66757 , H01L29/78603 , H01L29/78621 , H01L29/78675
摘要： A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.
摘要翻译： 一种制造薄膜晶体管的方法，该方法是通过设定用于使基板上形成的活性层结晶的热处理的温度不会使基板变形，并且以不同于 热处理，以及通过在基板上形成吸热膜，半导体膜，栅极绝缘膜和栅电极而制备的半导体器件，所述吸热膜设置在与半导体膜基本对应的区域内。
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公开(公告)号：US06790714B2
公开(公告)日：2004-09-14
申请号：US09813866
申请日：2001-03-22
IPC分类号： H01L2100
CPC分类号： H01L21/02667 , G02F1/13454 , H01L21/02422 , H01L21/02488 , H01L21/02532 , H01L21/02595 , H01L21/0262 , H01L21/02686 , H01L21/2022 , H01L27/12 , H01L27/1285 , H01L29/4908 , H01L29/66757 , H01L29/78603 , H01L29/78621 , H01L29/78675
摘要： A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.
摘要翻译： 一种制造薄膜晶体管的方法，该方法是通过设定用于使基板上形成的活性层结晶的热处理的温度不会使基板变形，并且以不同于 热处理，以及通过在基板上形成吸热膜，半导体膜，栅极绝缘膜和栅电极而制备的半导体器件，所述吸热膜设置在与半导体膜基本对应的区域内。
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公开(公告)号：US07084052B2
公开(公告)日：2006-08-01
申请号：US10917394
申请日：2004-08-13
IPC分类号： H01L21/425
CPC分类号： H01L21/02667 , G02F1/13454 , H01L21/02422 , H01L21/02488 , H01L21/02532 , H01L21/02595 , H01L21/0262 , H01L21/02686 , H01L21/2022 , H01L27/12 , H01L27/1285 , H01L29/4908 , H01L29/66757 , H01L29/78603 , H01L29/78621 , H01L29/78675
摘要： A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.
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公开(公告)号：US06500704B1
公开(公告)日：2002-12-31
申请号：US09056604
申请日：1998-04-08
IPC分类号： H01L2184
CPC分类号： H01L21/02686 , G02F1/13454 , H01L21/02532 , H01L21/0262 , H01L21/2022 , H01L27/12 , H01L27/1281 , H01L27/1285 , H01L29/4908 , H01L29/66757 , H01L29/78603 , H01L29/78621 , H01L29/78648 , H01L29/78675
摘要： A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.
摘要翻译： 一种制造薄膜晶体管的方法，该方法是通过设定用于使基板上形成的活性层结晶的热处理的温度不会使基板变形，并且以不同于 热处理，以及通过在基板上形成吸热膜，半导体膜，栅极绝缘膜和栅电极而制备的半导体器件，所述吸热膜设置在与半导体膜基本对应的区域内。
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5.发明授权Thin film transistor device, display device and method of fabricating the same 失效薄膜晶体管器件，显示器件及其制造方法
公开(公告)号：US5771110A
公开(公告)日：1998-06-23
申请号：US677424
申请日：1996-07-02
IPC分类号： G02F1/1362 , H01L21/20 , H01L21/336 , H01L21/77 , H01L21/84 , H01L27/12 , H01L29/49 , H01L29/786 , H01L27/105
CPC分类号： G02F1/13454 , H01L21/2022 , H01L27/12 , H01L27/1281 , H01L27/1285 , H01L29/4908 , H01L29/66757 , H01L29/78603 , H01L29/78621 , H01L29/78648 , H01L29/78675
摘要： A method of fabricating a thin film transistor by setting the temperature of a heat treatment for crystallizing an active layer which is formed on a substrate at a level not deforming the substrate and activating an impurity layer in a heat treatment method different from that employed for the heat treatment, and a semiconductor device prepared by forming a heat absorption film, a semiconductor film, a gate insulating film, and a gate electrode on a substrate, the heat absorption film being provided within a region substantially corresponding to the semiconductor film.
摘要翻译： 一种制造薄膜晶体管的方法，该方法是通过设定用于使基板上形成的活性层结晶的热处理的温度不会使基板变形，并且以不同于 热处理，以及通过在基板上形成吸热膜，半导体膜，栅极绝缘膜和栅电极而制备的半导体器件，所述吸热膜设置在与半导体膜基本对应的区域内。
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6.发明授权Display units having two insolating films and a planarizing film and process for producing the same 失效具有两个绝缘膜和平面化膜的显示单元及其制造方法
公开(公告)号：US5721601A
公开(公告)日：1998-02-24
申请号：US532484
申请日：1995-09-22
申请人： Toshifumi Yamaji , Kou Masahara , Nobuhiko Oda , Koji Suzuki , Shiro Nakanishi , Hisashi Abe , Kiyoshi Yoneda , Yoshihiro Morimoto
发明人： Toshifumi Yamaji , Kou Masahara , Nobuhiko Oda , Koji Suzuki , Shiro Nakanishi , Hisashi Abe , Kiyoshi Yoneda , Yoshihiro Morimoto
IPC分类号： G02F1/1343 , G02F1/1333 , G02F1/136 , G02F1/1362 , G02F1/1368 , H01L21/336 , H01L29/786
CPC分类号： G02F1/136227 , G02F2001/133357
摘要： A liquid crystal display unit is described, which includes a first substrate, a second substrate opposing to the first substrate, pixel driving elements, first and second insulation layers, a planarizing film and a liquid crystal layer. The pixel driving elements are disposed on the first substrate and between the first and second substrates. The first insulation layer is deposited over the first substrate and the pixel driving elements. The planarizing film is formed on the first insulation layer. This planarizing film provides a substantially flat surface over the first substrate to minimize a height of a step present between an area corresponding to each pixel driving element and an area locating adjacent to the pixel driving element on the first substrate. The second insulation layer is formed on the planarizing film. The display electrodes are formed on the second insulation layer and electrically connected to the pixel driving elements, respectively. The liquid crystal layer is located between the first substrate and said second substrate.
摘要翻译： 描述了一种液晶显示单元，其包括第一基板，与第一基板相对的第二基板，像素驱动元件，第一和第二绝缘层，平坦化膜和液晶层。 像素驱动元件设置在第一基板上并且在第一和第二基板之间。 第一绝缘层沉积在第一衬底和像素驱动元件上。 平坦化膜形成在第一绝缘层上。 该平坦化膜在第一基板上提供基本上平坦的表面，以使在与每个像素驱动元件相对应的区域和与第一基板上的像素驱动元件相邻定位的区域之间存在的台阶的高度最小化。 第二绝缘层形成在平坦化膜上。 显示电极分别形成在第二绝缘层上并与像素驱动元件电连接。 液晶层位于第一基板和第二基板之间。
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公开(公告)号：US20050042809A1
公开(公告)日：2005-02-24
申请号：US10946037
申请日：2004-09-21
IPC分类号： G02F1/136 , G02F1/00 , G02F1/1368 , G09F9/30 , H01L21/00 , H01L21/336 , H01L21/77 , H01L21/8238 , H01L21/84 , H01L27/12 , H01L29/04 , H01L29/786
CPC分类号： H01L29/66765 , H01L27/12 , H01L27/1248 , H01L29/78621 , H01L29/78678
摘要： In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper (55) is removed. The ion stopper (55) does not remain in the interlayer insulating film (8) lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper (55), and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer (4). The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.
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8.发明申请公开(公告)号：US20050035348A1
公开(公告)日：2005-02-17
申请号：US10945233
申请日：2004-09-20
IPC分类号： G02F1/136 , G02F1/00 , G02F1/1368 , G09F9/30 , H01L21/00 , H01L21/336 , H01L21/77 , H01L21/8238 , H01L21/84 , H01L27/12 , H01L29/04 , H01L29/786
CPC分类号： H01L29/66765 , H01L27/12 , H01L27/1248 , H01L29/78621 , H01L29/78678
摘要： In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper (55) is removed. The ion stopper (55) does not remain in the interlayer insulating film (8) lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper (55), and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer (4). The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.
摘要翻译： 在底栅型薄膜晶体管制造方法中，在离子掺杂之后，去除离子塞（55）。 离子限制器（55）不会留在位于栅电极正上方的层间绝缘膜（8）中。 薄膜晶体管具有这样的结构：离子阻挡层（55）和层间绝缘层至少与半导体层（4）的沟道区域直接接触。 层间绝缘膜和半导体层4之间的界面附近的杂质浓度为10 18原子/ cc以下。 这种结构可以防止反向通道现象，并减少由制造变化引起的特性变化。
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9.发明授权公开(公告)号：US07163850B2
公开(公告)日：2007-01-16
申请号：US10945233
申请日：2004-09-20
IPC分类号： H01L21/00
CPC分类号： H01L29/66765 , H01L27/12 , H01L27/1248 , H01L29/78621 , H01L29/78678
摘要： In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper (55) is removed. The ion stopper (55) does not remain in the interlayer insulating film (8) lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper (55), and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer (4). The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.
摘要翻译： 在底栅型薄膜晶体管制造方法中，在离子掺杂之后，去除离子塞（55）。 离子限制器（55）不会留在位于栅电极正上方的层间绝缘膜（8）中。 薄膜晶体管具有这样的结构：离子阻挡层（55）和层间绝缘层至少与半导体层（4）的沟道区域直接接触。 层间绝缘膜与半导体层4之间的界面附近的杂质浓度为10原子/ cc以下。 这种结构可以防止反向通道现象，并减少由制造变化引起的特性变化。
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10.发明授权公开(公告)号：US06815272B2
公开(公告)日：2004-11-09
申请号：US10008389
申请日：2001-11-06
IPC分类号： H01L2100
CPC分类号： H01L29/66765 , H01L27/12 , H01L27/1248 , H01L29/78621 , H01L29/78678
摘要： In a bottom gate-type thin-film transistor manufacturing method, after ion doping, an ion stopper is removed. The ion stopper does not remain in the interlayer insulating film lying immediately above the gate electrode. The thin-film transistor has such a structure that no ion stopper, and the interlayer insulating layer is in direct contact with at least the channel region of the semiconductor layer. The impurity concentration in the vicinity of the interface between the interlayer insulating film and the semiconductor layer 4 is 1018 atoms/cc or less. This structure can prevent the back channel phenomenon and reduce variations in characteristic resulting from variations in manufacturing.
摘要翻译： 在底栅型薄膜晶体管制造方法中，在离子掺杂之后，去除离子塞。 离子限制器不会残留在位于栅电极正上方的层间绝缘膜中。 薄膜晶体管具有这样的结构：离子阻挡层和层间绝缘层至少与半导体层的沟道区域直接接触。 层间绝缘膜和半导体层4之间的界面附近的杂质浓度为10 18原子/ cc以下。 这种结构可以防止反向通道现象，并减少由制造变化引起的特性变化。
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