公开(公告)号：US20240324174A1

公开(公告)日：2024-09-26

申请号：US18605986

申请日：2024-03-15

申请人： Kioxia Corporation

发明人： Takafumi MASUDA ,  Mutsumi OKAJIMA ,  Nobuyoshi SAITO ,  Keiji IKEDA

IPC分类号： H10B12/00

CPC分类号： H10B12/30 ,  H10B12/03 ,  H10B12/05

摘要： A semiconductor memory device includes memory layers arranged in a first direction and a via-wiring extending in the first direction. The plurality of memory layers each include a semiconductor layer electrically connected to the via-wiring, a gate electrode opposed to surfaces of the semiconductor layer in the first direction, a memory portion disposed on one side in a second direction with respect to the semiconductor layer, a wiring disposed on the other side in the second direction with respect to the semiconductor layer, and a connection wiring connected to the gate electrode and the wiring. The connection wiring includes a first part extending in the second direction along a side surface of the gate electrode in the third direction and a second part continuous with the first part, extending in the third direction along a side surface of the wiring in the second direction.

公开(公告)号：US20240312911A1

公开(公告)日：2024-09-19

申请号：US18601745

申请日：2024-03-11

申请人： Kioxia Corporation

发明人： Takafumi MASUDA ,  Mutsumi OKAJIMA ,  Nobuyoshi SAITO ,  Keiji IKEDA

IPC分类号： H01L23/528 ,  H01L23/522 ,  H10B12/00

CPC分类号： H01L23/5283 ,  H01L23/5226 ,  H01L23/528 ,  H10B12/315 ,  H10B12/482

摘要： A semiconductor memory device includes a memory layer and a via-wiring extending in a first direction. The memory layer includes a semiconductor layer electrically connected to the via-wiring, a gate electrode including parts opposed to surfaces of the semiconductor layer on one side and the other side in the first direction, a memory portion disposed on one side in a second direction with respect to the semiconductor layer, and a wiring disposed on the other side in the second direction with respect to the semiconductor layer. In a cross-sectional surface perpendicular to the first direction and including one of the parts of the gate electrode, the via-wiring includes a surface opposed to the gate electrode and a surface not opposed to the gate electrode. A part of the gate electrode is disposed on a memory portion side with respect to the via-wiring in the second direction.

公开(公告)号：US20240087616A1

公开(公告)日：2024-03-14

申请号：US18463686

申请日：2023-09-08

申请人： Kioxia Corporation

发明人： Takafumi MASUDA ,  Nobuyoshi SAITO ,  Mutsumi OKAJIMA ,  Keiji IKEDA

IPC分类号： G11C5/06 ,  G11C5/10

CPC分类号： G11C5/063 ,  G11C5/10

摘要： A semiconductor memory device comprises: memory layers arranged in a first direction; and a first and a second via wirings having different positions in a second direction. The memory layer comprises: a first transistor electrically connected to the first via wiring; a memory portion electrically connected to the first transistor; a wiring electrically connected to the first transistor; a second transistor electrically connected to the second via wiring; and an electrode provided in a current path between the second transistor and the wiring. The second transistor comprises: a semiconductor layer electrically connected to the electrode and the second via wiring; and a gate electrode facing the semiconductor layer. The semiconductor layer faces at least one of surfaces on one side or the other side in the first direction of the gate electrode. The electrode includes a portion arranged with the second via wiring in a third direction.

公开(公告)号：US20240038280A1

公开(公告)日：2024-02-01

申请号：US18184792

申请日：2023-03-16

申请人： Kioxia Corporation

发明人： Takafumi MASUDA ,  Mutsumi OKAJIMA ,  Nobuyoshi SAITO ,  Keiji IKEDA

IPC分类号： G11C5/10 ,  G11C11/4097 ,  G11C11/4096

CPC分类号： G11C5/10 ,  G11C11/4097 ,  G11C11/4096

摘要： A semiconductor memory device comprises: memory layers arranged in a first direction; and a first wiring extending in the first direction. The memory layers each comprise: a memory portion; a transistor; and a second wiring. The transistor comprises: a semiconductor layer electrically connected between the memory portion and the first wiring; a gate electrode facing the semiconductor layer and electrically connected to the second wiring; and a gate insulating film provided between the semiconductor layer and the gate electrode. The semiconductor layer faces surfaces of the gate electrode on one side and the other side in the first direction. In a cross section perpendicular to the first direction and including a part of the transistor corresponding to one of the memory layers, the first wiring comprises: a first surface in contact with the transistor; and a second surface not in contact with the transistor.

公开(公告)号：US20220302120A1

公开(公告)日：2022-09-22

申请号：US17470871

申请日：2021-09-09

申请人： Kioxia Corporation

发明人： Yuta SATO ,  Tomomasa UEDA ,  Nobuyoshi SAITO ,  Keiji IKEDA

IPC分类号： H01L27/108 ,  H01L29/24 ,  H01L29/786

摘要： A semiconductor device of an embodiment is provided with: an oxide semiconductor layer including a first region, a second region, and a third region between the first region and the second region; a gate electrode; a gate insulating layer; a first electrode electrically connected to the first region; a second electrode electrically connected to the second region; a first conductive layer provided at least one of positions between the first region and the first electrode or between the second region and the second electrode and containing a first metal element and at least one element of oxygen (O) or nitrogen (N); and a second conductive layer provided between the oxide semiconductor layer and the first conductive layer and containing oxygen (O) and at least one element selected from indium (In), zinc (Zn), tin (Sn), or cadmium (Cd). The second conductive layer is thicker than the first conductive layer.

公开(公告)号：US20220085212A1

公开(公告)日：2022-03-17

申请号：US17198682

申请日：2021-03-11

申请人： Kioxia Corporation

发明人： Yuta SATO ,  Tomomasa UEDA ,  Nobuyoshi SAITO ,  Keiji IKEDA

IPC分类号： H01L29/78 ,  H01L27/12 ,  H01L29/24 ,  H01L27/13

摘要： A semiconductor device of an embodiment includes a substrate, a first electrode, a second electrode, the first electrode provided between the substrate and the second electrode, the oxide semiconductor layer in contact with the first electrode, an oxide semiconductor layer between the first electrode and the second electrode, the oxide semiconductor layer contains Zn and at least one first element selected from In, Ga, Si, Al, and Sn; a conductive layer between the oxide semiconductor layer and the second electrode, the conductive layer in contact with the second electrode, the conductive layer contains O and at least one second element selected from the group consisting of In, Ga, Si, Al, Sn, Zn, and Ti, a gate electrode; and a gate insulating layer between the oxide semiconductor layer and the gate electrode.

公开(公告)号：US20240081042A1

公开(公告)日：2024-03-07

申请号：US18459978

申请日：2023-09-01

申请人： Kioxia Corporation

发明人： Takafumi MASUDA ,  Mutsumi OKAJIMA ,  Nobuyoshi SAITO ,  Keiji IKEDA

IPC分类号： H10B12/00

CPC分类号： H10B12/30 ,  H10B12/02

摘要： A semiconductor memory device comprises: a first memory layer; and a first via wiring and a second via wiring extending in a first direction, and having different positions from each other in a second direction. The first memory layer comprises: a first transistor electrically connected to the first via wiring; a memory portion electrically connected to the first transistor; a first wiring electrically connected to the first transistor; a second transistor electrically connected to the second via wiring and the first wiring; a first electrode electrically connected to the second transistor; and a second electrode electrically connected to the first wiring and first electrode. A length of the second electrode in the first direction is larger than one or both of a length of the first wiring in the first direction and a length of the first conductive layer in the first direction.

公开(公告)号：US20230309294A1

公开(公告)日：2023-09-28

申请号：US17901772

申请日：2022-09-01

申请人： Kioxia Corporation

发明人： Mutsumi OKAJIMA ,  Nobuyoshi SAITO ,  Keiji IKEDA ,  Kotaro NODA ,  Takanori AKITA

IPC分类号： H01L27/108

CPC分类号： H01L27/1082 ,  H01L27/10897 ,  H01L27/10873

摘要： A semiconductor device includes: an oxide semiconductor layer extending in a first direction; a gate electrode overlapping the oxide semiconductor layer in a second direction intersecting the first direction; a gate insulating film provided between the gate electrode and the oxide semiconductor layer; a first conductive layer provided on the oxide semiconductor layer in the first direction and containing a conductive oxide; a second conductive layer provided on the first conductive layer in the first direction and containing a metal element; a first protective film in contact with a side surface of the second conductive layer; and a second protective film in contact with at least a part of a side surface or an upper surface of the first conductive layer. The first protective film and the second protective film each contain a material having an oxygen diffusion coefficient smaller than that of the second conductive layer.

公开(公告)号：US20220406934A1

公开(公告)日：2022-12-22

申请号：US17875376

申请日：2022-07-27

申请人： Kioxia Corporation

发明人： Yuta SATO ,  Tomomasa UEDA ,  Nobuyoshi SAITO ,  Keiji IKEDA

IPC分类号： H01L29/78 ,  H01L27/12 ,  H01L27/13 ,  H01L29/24

摘要： A semiconductor device of an embodiment includes a substrate, a first electrode, a second electrode, the first electrode provided between the substrate and the second electrode, the oxide semiconductor layer in contact with the first electrode, an oxide semiconductor layer between the first electrode and the second electrode, the oxide semiconductor layer contains Zn and at least one first element selected from In, Ga, Si, Al, and Sn; a conductive layer between the oxide semiconductor layer and the second electrode, the conductive layer in contact with the second electrode, the conductive layer contains O and at least one second element selected from the group consisting of In, Ga, Si, Al, Sn, Zn, and Ti, a gate electrode; and a gate insulating layer between the oxide semiconductor layer and the gate electrode.

公开(公告)号：US20240260253A1

公开(公告)日：2024-08-01

申请号：US18423110

申请日：2024-01-25

申请人： Kioxia Corporation

发明人： Mutsumi OKAJIMA ,  Takafumi MASUDA ,  Nobuyoshi SAITO ,  Keiji IKEDA

IPC分类号： H10B12/00

CPC分类号： H10B12/30 ,  H10B12/03 ,  H10B12/05

摘要： A semiconductor memory device comprises: a substrate;
memory layers arranged in a first direction intersecting with a surface of the substrate; and a first via wiring extending in the first direction. The memory layers each comprise: a first semiconductor layer electrically connected to the first via wiring; a first gate electrode facing surfaces on one side and the other side in the first direction of the first semiconductor layer; a memory portion which is provided on one side in a second direction intersecting with the first direction with respect to the first semiconductor layer, and is electrically connected to the first semiconductor layer; and a first wiring which is provided on the other side in the second direction with respect to the first semiconductor layer, is electrically connected to the first gate electrode, and extends in a third direction intersecting with the first direction and the second direction.