公开(公告)号：US12125878B2

公开(公告)日：2024-10-22

申请号：US17350492

申请日：2021-06-17

申请人： Kioxia Corporation

发明人： Tomonari Shioda ,  Yasunori Oshima ,  Taichi Iwasaki ,  Shota Yamagiwa ,  Hiroto Saito

IPC分类号： H01L29/08 ,  H01L27/12 ,  H01L29/40 ,  H01L29/417 ,  H01L29/66 ,  H01L29/78 ,  H01L29/167 ,  H01L29/45

CPC分类号： H01L29/0847 ,  H01L27/1207 ,  H01L29/401 ,  H01L29/41766 ,  H01L29/66636 ,  H01L29/7848 ,  H01L29/167 ,  H01L29/456

摘要： A semiconductor device in an embodiment includes a substrate and a transistor. The transistor includes a source layer, a drain layer, a gate insulation film, a gate electrode, a contact plug and a first epitaxial layer. The source layer and the drain layer are provided in surface regions of the substrate, and contain an impurity. The gate insulation film is provided on the substrate between the source layer and the drain layer. The gate electrode is provided on the gate insulation film. The contact plug is provided so as to protrude to the source layer or the drain layer downward of a surface of the substrate. The first epitaxial layer is provided between the contact plug and the source layer or drain layer, and contains both the impurity and carbon.

公开(公告)号：US11984484B2

公开(公告)日：2024-05-14

申请号：US17470982

申请日：2021-09-09

申请人： Kioxia Corporation

发明人： Tomonori Kajino ,  Taichi Iwasaki ,  Tatsuya Fujishima ,  Masayuki Shishido ,  Nozomi Kido

IPC分类号： H01L29/417 ,  G11C16/04 ,  H01L29/423 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H01L29/06

CPC分类号： H01L29/41775 ,  G11C16/0483 ,  H01L29/42328 ,  H01L29/42344 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B43/10 ,  H10B43/27 ,  H10B43/35 ,  H01L29/0607

摘要： A semiconductor memory device according to an embodiment includes a substrate, a source line, word lines, a pillar, and a first member. The first member is provided to penetrate the source line. The first member includes a first portion which is far from the substrate, and a second portion which is near the substrate. The first member includes a first contact and a first insulating film. The first contact is provided to extend from the first portion to the second portion. The first contact is electrically connected to the substrate. The first insulating film insulates the source line from the first contact. The first member includes a stepped portion at a boundary part between the first portion and the second portion.

公开(公告)号：US11594549B2

公开(公告)日：2023-02-28

申请号：US17202690

申请日：2021-03-16

申请人： Kioxia Corporation

发明人： Ayumi Watarai ,  Taichi Iwasaki ,  Osamu Matsuura ,  Yu Hirotsu ,  Sota Matsumoto

IPC分类号： H01L27/11578 ,  H01L27/11519 ,  H01L27/11521 ,  H01L27/11526 ,  G11C8/14 ,  H01L27/11565 ,  H01L27/11568 ,  H01L27/11573 ,  H01L27/11551

摘要： A semiconductor memory device according to an embodiment includes a substrate, a source line, word lines, a pillar, an outer peripheral conductive layer, a lower layer conductive layer, and a first contact. The substrate includes a core region and a first region.
The outer peripheral conductive layer is provided to surround the core region in the first region. The outer peripheral conductive layer is included in a first layer. The lower layer conductive layer is provided in the first region. The first contact is provided on the lower layer conductive layer to surround the core region in the first region. An upper end of the first contact is included in the first layer. The first contact is electrically connected to the outer peripheral conductive layer.