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1.发明授权Luminance and chrominance signal separation circuit employing comparison of level detected signal with a reference level 失效亮度和色度信号分离电路采用电平检测信号与参考电平进行比较
公开(公告)号：US5426470A
公开(公告)日：1995-06-20
申请号：US126188
申请日：1993-09-24
CPC分类号： H04N9/78
摘要： A luminance and chrominance signal separation circuit in which, when its comparing circuits decide that the level of high-frequency components of a luminance signal is lower than a predetermined level, a switching circuit, controlled by a control circuit, selects and outputs a chrominance signal output from a BPF processing circuit.
摘要翻译： 一种亮度和色度信号分离电路，其中当比较电路判定亮度信号的高频分量的电平低于预定电平时，由控制电路控制的开关电路选择并输出色度信号 从BPF处理电路输出。
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公开(公告)号：US4673983A
公开(公告)日：1987-06-16
申请号：US915397
申请日：1986-10-06
CPC分类号： H04N5/45
摘要： In a picture-in-picture television receiver, the subpicture signal is A-D converted; the converted digital subpicture signal is latched in response a subpicture clock in synchronism with a subpicture synchronizing signal; the latched signal is latched again and stored in an image memory in response to a main picture synchronizing signal; and the latched signal is read from the image memory in synchronism with the main picture synchronizing signal, in order that the subpicture can stably be inserted in a predetermined area of the main picture by eliminating the unstable data duration during which variation in the subpicture signal is different for each bit signal thereof.
摘要翻译： 在画中画电视接收机中，子画面信号被A-D转换; 经转换的数字子画面信号与子画面同步信号同步地响应于子画面时钟被锁存; 锁存信号被再次锁存并响应于主图像同步信号而存储在图像存储器中; 并且与主画面同步信号同步地从图像存储器中读取锁存信号，以便通过消除子图像信号变化的不稳定数据持续时间，子画面可以稳定地插入主画面的预定区域 对于其每个位信号而言是不同的。
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3.发明授权Video signal processing apparatus, video signal processing method and video source determining method 失效视频信号处理装置，视频信号处理方法和视频源确定方法公开(公告)号：US07283174B2
公开(公告)日：2007-10-16
申请号：US10475732
申请日：2002-04-23
申请人： Masaharu Tokuhara , Toshio Sarugaku , Naoki Kaneko , Seiko Imai
发明人： Masaharu Tokuhara , Toshio Sarugaku , Naoki Kaneko , Seiko Imai
CPC分类号： H04N7/0112 , H04N7/012 , Y10S348/911
摘要： There is provided a video signal processing apparatus that makes it possible to realize a favorable display of pictures by increasing the detection accuracy of the video source of an input video signal and by using an appropriate scanning method for an output video signal in accordance with the determined type of video source. The video signal processing apparatus includes video source determining means for determining whether the video source of a video signal is a film source, calculating means for calculating a degree of difference between a picture of a field of the video signal and a picture of a field of a delayed video signal, threshold setting means, comparison means for comparing the degree of difference and a threshold and determining whether the pictures of each field match, and a signal pattern detecting means for detecting a signal pattern of a signal outputted by the comparison means and determining whether the video source is a film source, with the threshold setting means outputting respectively different thresholds in a state where the video source is determined to be a film source and a state where the video source is not determined to be a film source.
摘要翻译： 提供了一种视频信号处理装置，其可以通过增加输入视频信号的视频源的检测精度并根据确定的输出视频信号使用适当的输出视频信号的扫描方法来实现图像的良好显示 视频源的类型 视频信号处理装置包括：视频源确定装置，用于确定视频信号的视频源是否是电影源;计算装置，用于计算视频信号的场的图像与场的图像之间的差异程度; 延迟视频信号，阈值设定装置，用于比较差异度和阈值并确定每个场的图像是否匹配的比较装置，以及用于检测由比较装置输出的信号的信号模式的信号模式检测装置，以及 确定视频源是否是电影源，其中阈值设置装置在视频源被确定为电影源的状态和视频源未被确定为电影源的状态下分别输出不同的阈值。
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4.发明授权Television receiver for extended definition video signal detects number of scan lines and controls signal processors 失效用于扩展定义的电视接收机视频信号检测扫描线数量和控制信号处理器
公开(公告)号：US5227866A
公开(公告)日：1993-07-13
申请号：US845710
申请日：1992-03-04
摘要： A television receiver for extended definition television carries out scanning line interpolation in a way that eliminates picture shift on the screen and ensures normal display when supplied with a non-standard video signal having a scanning line count of other than 262.5 lines per field. The television receiver includes a scanning line interpolation circuit, a normal video signal detection circuit and a interpolation controller. The scanning line interpolation circuit effects scanning line interpolation using either data in the current field or out-of-field data as per the result of motion detection in the picture. The normal video signal detection circuit distinguishes the normal video signal from other signals by detecting the number of scanning lines involved. The interpolation controller causes the scanning line interpolation circuit to effect scanning line interpolation using only the inside-field data if the supplied signal is a non-standard signal.
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5.发明授权Sampling rate converting system for converting the sampling rate of a video signal 失效用于转换视频信号采样率的采样率转换系统
公开(公告)号：US5475436A
公开(公告)日：1995-12-12
申请号：US302033
申请日：1994-09-09
摘要： A plurality of circuit blocks that output digital signals with different sampling frequencies are connected to data buses in common. One of outputs of the circuit blocks is selected and the output is sent to a sampling rate converter circuit block through the data buses. Each of the circuit blocks has a tri-state buffer at its output stage. With an output enable signal, a desired circuit block can be selected.
摘要翻译： 输出具有不同采样频率的数字信号的多个电路块共同地连接到数据总线。 选择电路块的输出之一，并通过数据总线将输出发送到采样率转换器电路块。 每个电路块在其输出级具有三态缓冲器。 使用输出使能信号，可以选择所需的电路块。
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公开(公告)号：US4996595A
公开(公告)日：1991-02-26
申请号：US419901
申请日：1989-10-11
CPC分类号： H04N5/95 , H04N5/93 , Y10S348/91
摘要： Intermediate vertical synchronizing signals are generated to occur between the vertical synchronizing signals normally included in a conventional video signal. A first counter counts clock signals which are synchronized with the horizontal synchronizing signals normally included in the conventional video signal to provide a count representing the number of clock signals which are present in one-half of a field interval of that conventional video signal. The count provided by the first counter during the second preceding field interval is temporarily stored and compared to a count produced by a second counter which counts the clock signals from the beginning of the field interval. An intermediate vertical synchronizing signal is generated when the count of the second counter is equal to the stored count.
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公开(公告)号：US4263675A
公开(公告)日：1981-04-21
申请号：US88852
申请日：1979-10-29
摘要： An automatic fine tuning (AFT) circuit includes a frequency discriminator for discriminating an intermediate frequency signal, a capacitor supplied with the discriminated intermediate frequency signal to produce an AFT voltage thereacross, a comparator circuit for comparing the AFT voltage with a reference voltage, a first switching transistor controlled by the comparator circuit and which supplies and charges the capacitor with the reference voltage during a channel selection operation when the AFT voltage is less than the reference voltage, a second switching transistor controlled by the comparator circuit and which connects the capacitor to ground to discharge the same during a channel selection operation when the AFT voltage is greater than the reference voltage, and a third switching transistor for rendering the comparator circuit operative during a channel selection operation and inoperative during an AFT operation.
摘要翻译： 自动微调（AFT）电路包括用于鉴别中频信号的鉴频器，提供有鉴别中频信号的电容器以产生其上的AFT电压，用于将AFT电压与参考电压进行比较的比较器电路，第一 开关晶体管由比较器电路控制，并且当AFT电压小于参考电压时，在通道选择操作期间向电容器供给和充电电容器，由比较器电路控制并将电容器连接到地的第二开关晶体管 当AFT电压大于参考电压时，在频道选择操作期间对其进行放电;以及第三开关晶体管，用于使比较器电路在频道选择操作期间工作，并且在AFT操作期间不起作用。
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公开(公告)号：US4234963A
公开(公告)日：1980-11-18
申请号：US906406
申请日：1978-05-16
摘要： A synchronous detector adapted to detect a modulated information signal, such as a video IF signal. The modulated information signal is provided in the form of a vestigial sideband signal. A band-pass filter including a tuned circuit tuned to the frequency of the carrier on which the information signal is modulated has a pass band which is less than the frequency spectrum of the vestigial sideband signal so as to limit the frequency spectrum of the signal passed by the filter to a double sideband signal. A limiter is coupled to the band-pass filter to receive the double sideband signal and for deriving a switching carrier therefrom, the frequency of the switching carrier being equal to the frequency of the carrier on which the information signal is modulated. An emitter-follower circuit is connected between the band-pass filter and the limiter so as to couple the double sideband signal from the filter to the limiter. A multiplier circuit has first input terminals coupled to the limiter for receiving the derived switching carrier and second input terminals for receiving the modulated information signal, whereby the modulated information signal is multiplied with the switching carrier to obtain the information signal.
摘要翻译： 一种适用于检测诸如视频IF信号的调制信息信号的同步检测器。 调制信息信号以残留边带信号的形式提供。 包括被调谐到信号信号被调制的载波的频率的调谐电路的带通滤波器具有小于残留边带信号的频谱的通带，以限制通过的信号的频谱 通过滤波器到双边带信号。 限幅器耦合到带通滤波器以接收双边带信号并从其导出交换载波，切换载波的频率等于信息信号被调制的载波的频率。 射频跟随器电路连接在带通滤波器和限幅器之间，以将来自滤波器的双边带信号耦合到限幅器。 乘法器电路具有耦合到限幅器的第一输入端子，用于接收导出的切换载波和用于接收调制信息信号的第二输入端，由此将调制信息信号与切换载波相乘以获得信息信号。
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公开(公告)号：US4110635A
公开(公告)日：1978-08-29
申请号：US715630
申请日：1976-08-18
CPC分类号： H03D1/229 , H03F3/04 , H03F3/42 , H03F3/45089 , H04N5/455
摘要： An amplifier provides a complete video and sound I.F. signal to a synchronous detector switching circuit, and the switching signal to be applied to the switching circuit is obtained from the same amplifier by connecting a grounded base stage, with its emitter impedance, in series with the amplifier load. The grounded base stage has a load tuned to the I.F. carrier frequency, and the filtered signal from the grounded base is the signal applied as the switching signal to the synchronous detector switching circuit.
摘要翻译： 放大器提供完整的视频和声音I.F. 信号发送到同步检测器开关电路，并且通过将接地基站与发射极阻抗串联连接到放大器负载，从同一放大器获得施加到开关电路的开关信号。 接地基座有一个负载调谐到I.F. 载波频率，并且来自接地基极的滤波信号是作为切换信号施加到同步检波器开关电路的信号。
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公开(公告)号：US4985701A
公开(公告)日：1991-01-15
申请号：US379107
申请日：1989-07-13
IPC分类号： G06F5/00 , G06T9/00 , H03M7/30 , H04N7/01 , H04N11/04 , H04N11/20 , H04N19/00 , H04N19/426 , H04N19/51 , H04N19/59 , H04N19/85
CPC分类号： H03M7/30
摘要： A time-division bit number circuit that comprises a bit number expansion system and/or a bit number reduction system. The bit number expansion system converts an N bits signal to a 2N bits signal, while the bit number reduction system converts the 2N bits signal to the N bits signal where N is an integer. Thus, according to the time-division bit amount circuit, the number of memory can be saved, the area of circuit can be reduced and the pattern area of substrate can be reduced.
摘要翻译： 一种包括位数扩展系统和/或比特数减少系统的时分比特数电路。 位数扩展系统将N位信号转换为2N位信号，而位数减少系统将2N位信号转换为N位信号，其中N是整数。 因此，根据时分比特量电路，可以节省存储器的数量，可以减少电路的面积，并且可以减小衬底的图案区域。
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