摘要:
A time-division bit number circuit that comprises a bit number expansion system and/or a bit number reduction system. The bit number expansion system converts an N bits signal to a 2N bits signal, while the bit number reduction system converts the 2N bits signal to the N bits signal where N is an integer. Thus, according to the time-division bit amount circuit, the number of memory can be saved, the area of circuit can be reduced and the pattern area of substrate can be reduced.
摘要:
A moving detection circuit which has a difference level generator which includes at least a frame delay circuit, and a vertical correlation detector which is connected to the difference signal generator and including a plurality of filters connected to the difference signal generator. A switching circuit for selecting one of the plurality of filters is provided and a control circuit is connected to the vertical correlation detector so as to control the switching circuit in response to the output level of the vertical correlation detector.
摘要:
A signal processing circuit for a moving detection circuit which has a coefficient generator which is connected to an output of a moving detection circuit. A level comparator is connected between the moving detection circuit and the coefficient generator and is also connected to a threshold voltage switch. An isolated-point eliminating circuit is connected between the level comparator and a time base filter which is connected at its output terminal to the input terminal of the coefficient generator. The coefficient generator includes a plurality of one bit delay devices which are connected in series and the plurality of one bit delay devices have a plurality of output terminals, and an adder is connected to the plurality of output terminals so as to add the output signals.
摘要:
Interpolated scan lines are produced in response to received video signals which are comprised of conventional interlaced scan lines constituting successive fields. A delay circuit, preferably formed of field memory devices, such as three cascaded field memories, functions to delay the received video signals to provide a first scanned line signal in a given field, the next succeeding scan line signal in that field, an interlaced scan line signal in the next succeeding field and an interlaced scan line signal in the next preceding field. A first combining circuit combines the signal values of the next succeeding field interlaced scan line signal and the next preceding field interlaced scan line signal to form a first combined scan line signal. A second combining circuit combines the signal values of the first scan line signal in the given field and the next succeeding scan line signal in that field to form a second combined scan line signal. The first and second combined scan line signals are level adjusted and added to produce an interpolated scan line signal intermediate successive main scan lines in the given field.
摘要:
In a picture-in-picture television receiver, the subpicture signal is A-D converted; the converted digital subpicture signal is latched in response a subpicture clock in synchronism with a subpicture synchronizing signal; the latched signal is latched again and stored in an image memory in response to a main picture synchronizing signal; and the latched signal is read from the image memory in synchronism with the main picture synchronizing signal, in order that the subpicture can stably be inserted in a predetermined area of the main picture by eliminating the unstable data duration during which variation in the subpicture signal is different for each bit signal thereof.
摘要:
An automatic fine tuning (AFT) circuit includes a frequency discriminator for discriminating an intermediate frequency signal, a capacitor supplied with the discriminated intermediate frequency signal to produce an AFT voltage thereacross, a comparator circuit for comparing the AFT voltage with a reference voltage, a first switching transistor controlled by the comparator circuit and which supplies and charges the capacitor with the reference voltage during a channel selection operation when the AFT voltage is less than the reference voltage, a second switching transistor controlled by the comparator circuit and which connects the capacitor to ground to discharge the same during a channel selection operation when the AFT voltage is greater than the reference voltage, and a third switching transistor for rendering the comparator circuit operative during a channel selection operation and inoperative during an AFT operation.
摘要:
A synchronous detector adapted to detect a modulated information signal, such as a video IF signal. The modulated information signal is provided in the form of a vestigial sideband signal. A band-pass filter including a tuned circuit tuned to the frequency of the carrier on which the information signal is modulated has a pass band which is less than the frequency spectrum of the vestigial sideband signal so as to limit the frequency spectrum of the signal passed by the filter to a double sideband signal. A limiter is coupled to the band-pass filter to receive the double sideband signal and for deriving a switching carrier therefrom, the frequency of the switching carrier being equal to the frequency of the carrier on which the information signal is modulated. An emitter-follower circuit is connected between the band-pass filter and the limiter so as to couple the double sideband signal from the filter to the limiter. A multiplier circuit has first input terminals coupled to the limiter for receiving the derived switching carrier and second input terminals for receiving the modulated information signal, whereby the modulated information signal is multiplied with the switching carrier to obtain the information signal.
摘要:
An amplifier provides a complete video and sound I.F. signal to a synchronous detector switching circuit, and the switching signal to be applied to the switching circuit is obtained from the same amplifier by connecting a grounded base stage, with its emitter impedance, in series with the amplifier load. The grounded base stage has a load tuned to the I.F. carrier frequency, and the filtered signal from the grounded base is the signal applied as the switching signal to the synchronous detector switching circuit.
摘要:
There is provided a video signal processing apparatus that makes it possible to realize a favorable display of pictures by increasing the detection accuracy of the video source of an input video signal and by using an appropriate scanning method for an output video signal in accordance with the determined type of video source. The video signal processing apparatus includes video source determining means for determining whether the video source of a video signal is a film source, calculating means for calculating a degree of difference between a picture of a field of the video signal and a picture of a field of a delayed video signal, threshold setting means, comparison means for comparing the degree of difference and a threshold and determining whether the pictures of each field match, and a signal pattern detecting means for detecting a signal pattern of a signal outputted by the comparison means and determining whether the video source is a film source, with the threshold setting means outputting respectively different thresholds in a state where the video source is determined to be a film source and a state where the video source is not determined to be a film source.
摘要:
A dark signal component below a predetermined level of a video signal is varied such that a dark peak level is made to coincide with a pedestal level by feedback control. According to this configuration, a signal component toward a white level side above the predetermined level is not changed by dark restoration, thus obtaining stable color reproduction and stable brightness which are not affected by the dark restoring operation.