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    Small signal amplifier with large signal output boost stage
    1.
    发明申请
    Small signal amplifier with large signal output boost stage 有权
    具有大信号输出增强级的小信号放大器

    公开(公告)号：US20060164170A1

    公开(公告)日：2006-07-27

    申请号：US11313545

    申请日：2005-12-20

    申请人： A. Brokaw

    发明人： A. Brokaw

    IPC分类号： H03F3/16

    CPC分类号： H03F3/45278 ,  H03F1/3211 ,  H03F1/34 ,  H03F1/52 ,  H03F3/343 ,  H03F3/3435 ,  H03F3/345 ,  H03F3/42 ,  H03F3/4578 ,  H03F3/50 ,  H03F2200/426 ,  H03F2200/45 ,  H03F2200/91 ,  H03F2203/45526 ,  H03F2203/45722

    摘要： A small signal amplifier with a large signal output boost stage are connected between first and second supply rails. The small signal amplifier receives first and second input signals and provides an output signal at an output node which drives a load. Under small signal conditions, the output signal varies approximately linearly with the difference voltage. However, under large signal conditions, a rail-to-rail large signal output boost stage connected to the output node is arranged to drive the output node close to the first or second supply rail as needed to provide the current demanded by the load. The large signal output boost stage is off in small signal conditions, but comes on rapidly and transfers maximum charge to the load under large signal conditions.

    摘要翻译： 具有大信号输出升压级的小信号放大器连接在第一和第二电源轨之间。 小信号放大器接收第一和第二输入信号，并在驱动负载的输出节点处提供输出信号。 在小信号条件下，输出信号随差电压大致线性变化。 然而，在大信号条件下，连接到输出节点的轨到轨大信号输出升压级被布置成根据需要驱动靠近第一或第二供电轨的输出节点以提供负载所要求的电流。 大信号输出增强级在小信号条件下关闭，但快速进行，并在大信号条件下向负载传输最大电荷。

    Multi-cascode transistors
    3.
    发明授权
    Multi-cascode transistors 有权
    多串联晶体管

    公开(公告)号：US06888396B2

    公开(公告)日：2005-05-03

    申请号：US10385769

    申请日：2003-03-11

    申请人： Seyed-Ali Hajimiri ,  Scott D. Kee ,  Ichiri Aoki

    发明人： Seyed-Ali Hajimiri ,  Scott D. Kee ,  Ichiri Aoki

    IPC分类号： H03F1/22 ,  H03F3/42 ,  H03F3/45 ,  H03K17/687

    CPC分类号： H03F3/423 ,  H03F1/22 ,  H03F1/223 ,  H03F1/226 ,  H03F3/42 ,  H03F3/45179 ,  H03F2203/45301 ,  H03F2203/45394 ,  Y10T307/832

    摘要： A cascode circuit with improved withstand voltage is provided. The cascode circuit includes three or more transistors, such as MOSFET transistors. Each transistor has a control terminal, such as a gate, and two conduction terminals, such as a drain and a source. The conduction terminals are coupled in series between two output terminals, such as where the drain of each transistor is coupled to the source of another transistor. A signal input is provided to the gate for the first transistor. Two or more control voltage sources, such as DC bias voltages, are provided to the gate of the remaining transistors. The DC bias voltages are selected so as to maintain the voltage across each transistor to a level below a breakdown voltage level.

    摘要翻译： 提供了具有改善的耐受电压的共源共栅电路。 共源共栅电路包括三个或更多个晶体管，例如MOSFET晶体管。 每个晶体管具有诸如栅极的控制端子和诸如漏极和源极的两个导电端子。 导通端子串联在两个输出端子之间，例如每个晶体管的漏极耦合到另一个晶体管的源极。 向第一晶体管的栅极提供信号输入。 将两个或更多个控制电压源（例如DC偏置电压）提供给剩余晶体管的栅极。 选择DC偏置电压以便将每个晶体管两端的电压保持在低于击穿电压电平的电平。

    Low distortion amplifier
    4.
    发明申请
    Low distortion amplifier 有权
    低失真放大器

    公开(公告)号：US20020021171A1

    公开(公告)日：2002-02-21

    申请号：US09915190

    申请日：2001-07-24

    发明人： Bruce Halcro Candy

    IPC分类号： H03F001/36

    CPC分类号： H03F3/3018 ,  H03F3/42 ,  H03F3/4517 ,  H03F2203/30078 ,  H03F2203/30111 ,  H03F2203/45566

    摘要： An electronic amplifier providing very low distortion which includes an output stage with an output error correction stage containing two amplifiers and wherein there are at least four local negative feedback paths, an output of the first amplifier being connected to an input of output stage transistor buffers or output stage transistors through a first network, an output of the second amplifier being connected to an input of output stage transistor buffers or output stage transistors through a second network, where components of the first and second amplifier the local negative feedback paths, first and second networks and output stage transistor buffers are selected to form substantially second order local dominant pole. Also disclosed is the supply of power to said first and second amplifiers from a floating power supply means coupled to either an or the output of the output stage so that the voltage of the floating power supply will follow substantially an output voltage of the output stage.

    摘要翻译： 提供非常低失真的电子放大器，其包括具有包含两个放大器的输出误差校正级的输出级，并且其中存在至少四个局部负反馈路径，第一放大器的输出连接到输出级晶体管缓冲器的输入或 输出级晶体管通过第一网络，第二放大器的输出端通过第二网络连接到输出级晶体管缓冲器或输出级晶体管的输入，其中第一和第二放大器的部件为局部负反馈路径，第一和第二 网络和输出级晶体管缓冲器被选择以形成基本上二阶局部优势极。 还公开了从耦合到输出级的输出或输出的浮动电源装置向所述第一和第二放大器供电，使得浮动电源的电压基本上将跟随输出级的输出电压。

    Transformer coupled stacked power amplifier
    5.
    发明授权
    Transformer coupled stacked power amplifier 失效
    变压器耦合堆叠功率放大器

    公开(公告)号：US5867061A

    公开(公告)日：1999-02-02

    申请号：US760070

    申请日：1996-12-04

    申请人： Gordon G. Rabjohn ,  Mark S. Suthers ,  John McRory ,  Robert Leroux

    发明人： Gordon G. Rabjohn ,  Mark S. Suthers ,  John McRory ,  Robert Leroux

    IPC分类号： H03F3/42 ,  H03F3/68 ,  H03F3/26

    CPC分类号： H03F3/42

    摘要： A stacked power amplifier is provided in which an input signal is independently coupled to each of a series of amplifying devices in the stack. A transformer is used at the input circuit of each device to create an RF swing across each amplifying device which is substantially equal. This results in an equal distribution of RF and DC voltage among the devices in the stack.

    摘要翻译： 提供了一种堆叠式功率放大器，其中输入信号独立地耦合到堆叠中的一系列放大装置中的每一个。 在每个设备的输入电路上使用变压器，以在每个放大器件上产生基本相等的RF摆幅。 这导致堆叠中的器件之间的RF和DC电压的平均分配。

    High voltage circuits in low voltage CMOS process
    6.
    发明授权
    High voltage circuits in low voltage CMOS process 失效
    低电压CMOS工艺中的高压电路

    公开(公告)号：US4490629A

    公开(公告)日：1984-12-25

    申请号：US376903

    申请日：1982-05-10

    申请人： Allen R. Barlow ,  Corey Petersen

    发明人： Allen R. Barlow ,  Corey Petersen

    IPC分类号： H01L27/092 ,  H01L21/8234 ,  H01L21/8238 ,  H01L27/08 ,  H01L27/088 ,  H01L27/118 ,  H03F3/42 ,  H03K19/0185 ,  H03K19/08 ,  H03K19/0944 ,  H03K19/0948 ,  H03K19/003 ,  H03K17/10 ,  H03K19/092 ,  H03K19/094

    CPC分类号： H01L27/11898 ,  H03F3/42 ,  H03K19/018521 ,  H03K19/09448 ,  H03K19/0948

    摘要： A CMOS push-pull output buffer (171) is constructed utilizing a plurality of N channel transistors (74, 75, 76) and a plurality of P channel transistors (71, 72, 73) connected in series. The voltages applied to the gates of the N channel transistors and P channel transistors are selected to divide the high voltage (+V) substantially equally across the P channel transistors, when the P channel transistors are turned off, and substantially evenly divide the high voltage across the N channel transistors, when the N channel transistors are turned off.In another embodiment of this invention, selected ones of the N channel and P channel transistors are formed in order to have a high drain to bulk breakdown voltage.In another embodiment of this invention, a plurality of N channel and a plurality of P channel transistors are connected in series and driven by a single ended control voltage (C.sub.N), thus providing a first stage (101) which drives a second stage (100) having a plurality of P channel transistors and a plurality of N channel transistors (110, 111, 112), which provide the high voltage output voltage.In another embodiment of this invention, the first stage (101) is driven by a single ended control voltage (C.sub.N) and serves to drive a second stage (103) comprising a plurality of N channel transistors (110, 111, 112) and a plurality of bipolar transistors (120, 121), whereby said second stage provides the high voltage output signal.

    摘要翻译： 使用串联连接的多个N沟道晶体管（74,75,76）和多个P沟道晶体管（71,72,73）构造CMOS推挽输出缓冲器（171）。 当P沟道晶体管截止时，施加到N沟道晶体管和P沟道晶体管的栅极的电压被选择为在P沟道晶体管中基本上均匀地划分高电压（+ V），并且基本上均匀地划分高电压 跨越N沟道晶体管，当N沟道晶体管截止时。 在本发明的另一个实施例中，形成N沟道和P沟道晶体管中的选定的晶体管以便具有高的漏极到体的击穿电压。 在本发明的另一实施例中，多个N沟道和多个P沟道晶体管串联连接并由单端控制电压（CN）驱动，从而提供驱动第二级（100）的第一级（101） ）具有提供高电压输出电压的多个P沟道晶体管和多个N沟道晶体管（110,111,112）。 在本发明的另一实施例中，第一级（101）由单端控制电压（CN）驱动，并用于驱动包括多个N沟道晶体管（110,111,112）的第二级（103）和 多个双极晶体管（120,121），由此所述第二级提供高电压输出信号。

    High voltage amplifier
    7.
    发明授权
    High voltage amplifier 失效
    高压放大器

    公开(公告)号：US3983503A

    公开(公告)日：1976-09-28

    申请号：US508293

    申请日：1974-09-23

    申请人： Lawrence H. Bannister ,  Richard H. Baker

    发明人： Lawrence H. Bannister ,  Richard H. Baker

    IPC分类号： H03F3/42

    CPC分类号： H03F3/42

    摘要： A linear amplifier that is able to yield a maximum output voltage substantially greater than the breakdown voltage of the individual amplifying elements used and substantially greater than the voltage of a primary electric energy source that powers the amplifier. The amplifier consists of a plurality of stages connected in cascade, each stage, in turn, controlling the voltage level at which subsequent stages operate.

    摘要翻译： 一种线性放大器，其能够产生基本上大于所使用的各个放大元件的击穿电压的最大输出电压，并且基本上大于为放大器供电的初级电能源的电压。 放大器由级联连接的多个级组成，每级依次控制后续级工作的电压电平。