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    Process for production of polyurethane
    4.
    发明授权
    Process for production of polyurethane 失效
    聚氨酯生产工艺

    公开(公告)号：US4551518A

    公开(公告)日：1985-11-05

    申请号：US632921

    申请日：1984-07-20

    申请人： Mitsuo Matsumoto ,  Koji Hirai ,  Noriaki Yoshimura ,  Takayuki Okamura

    发明人： Mitsuo Matsumoto ,  Koji Hirai ,  Noriaki Yoshimura ,  Takayuki Okamura

    IPC分类号： C08G18/42 ,  C08G18/08

    CPC分类号： C08G18/4275

    摘要： A novel process for production of polyurethane having excellent hydrolysis resistance, heat resistance, low-temperature characteristics and no tendency of crystallization and capability of making high solid content solution, which is obtained from a polymerized polyol having two or more hydroxy groups in the molecule and a polyisocyanate, and optionally a chain extender, characterized in that the polymerized polyol component is a polymerized polyol having ##STR1## groups in the molecule.

    摘要翻译： 分子中具有两个以上羟基的聚合多元醇得到的具有优异的耐水解性，耐热性，低温特性，结晶倾向性和高固含量溶液制造能力的新型聚氨酯的制造方法，以及 多异氰酸酯和任选的扩链剂，其特征在于聚合的多元醇组分是分子中具有基团的聚合多元醇。

    Synthetic polyisoprene rubber latex
    6.
    发明授权
    Synthetic polyisoprene rubber latex 失效
    合成聚异戊二烯橡胶胶乳

    公开(公告)号：US3971746A

    公开(公告)日：1976-07-27

    申请号：US562876

    申请日：1975-03-28

    申请人： Koji Hirai ,  Takayuki Okamura ,  Kiyoshi Fujii

    发明人： Koji Hirai ,  Takayuki Okamura ,  Kiyoshi Fujii

    IPC分类号： C08J3/07 ,  C08L9/10

    CPC分类号： C08J3/07 ,  C08J2313/00

    摘要： A synthetic polyisoprene rubber latex produced by emulsifying a solution of polyisoprene rubber in an organic solvent with water and removing the solvent from the resulting oil-in-water emulsion is significantly improved with respect to mechanical stability, wet gel strength and dry film strength by utilizing, as a polyisoprene rubber, a modified polyisoprene rubber prepared by introducing from about 0.03 to 20 carboxyl groups per 100 recurring units of isoprene monomer present in the synthetic cis-1,4-polyisoprene rubber.

    摘要翻译： 通过将有机溶剂中的聚异戊二烯橡胶溶液与水乳化并从所得水包油乳液中除去溶剂而制备的合成聚异戊二烯橡胶胶乳通过利用机械稳定性，湿凝胶强度和干膜强度而显着提高 作为聚异戊二烯橡胶，通过在合成的顺式-1,4-聚异戊二烯橡胶中每100重复单元的异戊二烯单体引入约0.03至20个羧基制备的改性聚异戊二烯橡胶。

    Nonvolatile semiconductor memory device and method for manufacturing same
    7.
    发明授权
    Nonvolatile semiconductor memory device and method for manufacturing same 失效
    非易失性半导体存储器件及其制造方法

    公开(公告)号：US08598649B2

    公开(公告)日：2013-12-03

    申请号：US12792378

    申请日：2010-06-02

    申请人： Takayuki Okamura ,  Noboru Ooike ,  Wataru Sakamoto ,  Takashi Izumida

    发明人： Takayuki Okamura ,  Noboru Ooike ,  Wataru Sakamoto ,  Takashi Izumida

    IPC分类号： H01L29/792 ,  H01L21/3205 ,  H01L21/4763

    CPC分类号： H01L27/11565 ,  H01L21/28282 ,  H01L27/11568

    摘要： A nonvolatile semiconductor memory device according to embodiment includes: a semiconductor substrate having an upper portion being partitioned into a plurality of semiconductor portions extending in a first direction; a charge storage film provided on the semiconductor portion; a word-line electrode provided on the semiconductor substrate and extending in a second direction intersecting with the first direction; and a pair of selection gate electrodes provided on both sides of the word-line electrode in the first direction on the semiconductor substrate and extending in the second direction, a shortest distance between a corner portion of each of the semiconductor portions and each of the selection gate electrodes being longer than a shortest distance between the corner portion of the semiconductor portion and the word-line electrode in a cross section parallel to the second direction.

    摘要翻译： 根据实施例的非易失性半导体存储器件包括：半导体衬底，其具有被分隔成沿第一方向延伸的多个半导体部分的上部; 设置在半导体部分上的电荷存储膜; 字线电极，其设置在所述半导体基板上并沿与所述第一方向交叉的第二方向延伸; 以及一对选择栅电极，其设置在所述半导体基板上的所述字线电极的所述第一方向的两侧，并且沿所述第二方向延伸，所述半导体部分的每个的角部与所述选择中的每一个之间的最短距离 栅电极比与半导体部分的角部和字线电极之间的平行于第二方向的截面中的最短距离更长。

    Semiconductor memory device including laminated gate having electric charge accumulating layer and control gate and method of manufacturing the same
    8.
    发明授权
    Semiconductor memory device including laminated gate having electric charge accumulating layer and control gate and method of manufacturing the same 有权
    包括具有电荷累积层和控制栅极的层叠栅极的半导体存储器件及其制造方法

    公开(公告)号：US07936005B2

    公开(公告)日：2011-05-03

    申请号：US12473709

    申请日：2009-05-28

    申请人： Takayuki Okamura

    发明人： Takayuki Okamura

    IPC分类号： H01L29/792

    CPC分类号： H01L27/11568

    摘要： A semiconductor memory device includes a first active region, a second active region, an element isolation region, memory cell transistors. Each of memory cell transistors includes a laminated gate and a first impurity diffusion layer functioning as a source and a drain. The laminated gate includes a first insulating film, a second insulating film, and a control gate electrode. The second insulating film is commonly connected between the plurality of memory cell transistors to step over the element isolation region and is in contact with an upper surface of the element isolation region. An upper surface of the element isolation region is higher than a bottom surface of the first insulating film and is located under the upper surface of the first insulating film.

    摘要翻译： 半导体存储器件包括第一有源区，第二有源区，元件隔离区，存储单元晶体管。 每个存储单元晶体管包括层叠栅极和用作源极和漏极的第一杂质扩散层。 层叠栅极包括第一绝缘膜，第二绝缘膜和控制栅电极。 第二绝缘膜通常连接在多个存储单元晶体管之间，以跨越元件隔离区并与元件隔离区的上表面接触。 元件隔离区的上表面高于第一绝缘膜的底面，位于第一绝缘膜的上表面的下方。

    Semiconductor device and manufacturing method thereof
    9.
    发明授权
    Semiconductor device and manufacturing method thereof 有权
    半导体装置及其制造方法

    公开(公告)号：US07795092B2

    公开(公告)日：2010-09-14

    申请号：US12132450

    申请日：2008-06-03

    申请人： Yasuyuki Matsuoka ,  Masaru Kito ,  Hideaki Aochi ,  Takayuki Okamura

    发明人： Yasuyuki Matsuoka ,  Masaru Kito ,  Hideaki Aochi ,  Takayuki Okamura

    IPC分类号： H01L21/336

    CPC分类号： H01L27/115 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/66825 ,  H01L29/7883

    摘要： A semiconductor memory device includes gate electrodes extending in a first direction above a surface of a substrate. The semiconductor memory device also includes a reinforcement insulation film formed in a line shape and extending in a second direction crossing the gate electrodes in a plane view viewed from above the surface of the substrate, and connected to adjacent gate electrodes. Further, the semiconductor memory device includes an interlayer dielectric film provided between the adjacent gate electrodes, and having a void inside.

    摘要翻译： 半导体存储器件包括沿基板表面的第一方向延伸的栅电极。 半导体存储器件还包括形成为线形并且在从基板的表面上方观察的平面图中的与栅电极交叉的第二方向上延伸并且连接到相邻栅电极的加强绝缘膜。 此外，半导体存储器件包括设置在相邻栅电极之间并且内部具有空隙的层间电介质膜。

    NONVOLATILE SEMICONDUCTOR MEMORY AND MANUFACTURING METHOD THEREOF
    10.
    发明申请
    NONVOLATILE SEMICONDUCTOR MEMORY AND MANUFACTURING METHOD THEREOF 有权
    非易失性半导体存储器及其制造方法

    公开(公告)号：US20090218607A1

    公开(公告)日：2009-09-03

    申请号：US12393186

    申请日：2009-02-26

    申请人： Takayuki Toba ,  Takayuki Okamura ,  Moto Yabuki

    发明人： Takayuki Toba ,  Takayuki Okamura ,  Moto Yabuki

    IPC分类号： H01L29/792 ,  H01L29/00 ,  H01L21/336

    CPC分类号： H01L27/11573

    摘要： A nonvolatile semiconductor memory of an aspect of the invention includes memory cells in the memory cell forming area, and select gate transistors in the select gate forming area. Each memory cell has two first diffusion layers formed in a semiconductor substrate, a first gate insulating film formed on the semiconductor substrate, a charge storage layer formed on the first gate insulating film, a first intermediate insulating film formed on the charge storage layer and a first gate electrode formed on the first intermediate insulating film. Each select gate transistor has two second diffusion layers formed in the semiconductor substrate, a second gate insulating film formed on the semiconductor substrate, a second intermediate insulating film formed in direct contact with the second gate insulating film and having the same structure as the first intermediate insulating film, and a second gate electrode formed on the second intermediate insulating film.

    摘要翻译： 本发明的一个方面的非易失性半导体存储器包括存储单元形成区域中的存储单元，并且在选择栅极形成区域中选择栅极晶体管。 每个存储单元具有形成在半导体衬底中的两个第一扩散层，形成在半导体衬底上的第一栅极绝缘膜，形成在第一栅极绝缘膜上的电荷存储层，形成在电荷存储层上的第一中间绝缘膜和 第一栅电极，形成在第一中间绝缘膜上。 每个选择晶体管具有形成在半导体衬底中的两个第二扩散层，形成在半导体衬底上的第二栅极绝缘膜，与第二栅极绝缘膜直接接触形成并具有与第一中间层相同结构的第二中间绝缘膜 绝缘膜和形成在第二中间绝缘膜上的第二栅电极。