Level shift circuit
    1.
    发明授权
    Level shift circuit 失效
    电平移位电路

    公开(公告)号:US5818278A

    公开(公告)日:1998-10-06

    申请号:US805883

    申请日:1997-03-03

    摘要: A level shift circuit shifting logic levels of an SCFL circuit to logic levels of a DCFL circuit, including an SCFL circuit having complementary outputs; two source follower circuits with their inputs respectively connected to the complementary outputs of the SCFL circuit; a high/low detecting circuit detecting "high" or "low" signals which have DCFL levels from the two source follower circuits and outputting signals having logic levels according to the detection results; and DCFL circuits with inputs connected to outputs of the high/low detecting circuit. Therefore, it is possible to obtain a level shift circuit operating with a wider voltage range and in a wider temperature range than the prior art circuit.

    摘要翻译: 电平移位电路将SCFL电路的逻辑电平转换为DCFL电路的逻辑电平,包括具有互补输出的SCFL电路; 两个源极跟随器电路的输入分别连接到SCFL电路的互补输出; 检测具有来自两个源极跟随器电路的DCFL电平并根据检测结果输出具有逻辑电平的信号的“高”或“低”信号的高/低检测电路; 以及具有与高/低检测电路的输出连接的输入的DCFL电路。 因此,可以获得在比现有技术电路更宽的电压范围和更宽的温度范围内工作的电平移位电路。

    Quadrature modulator having phase shift and amplitude compensation
circuits
    2.
    发明授权
    Quadrature modulator having phase shift and amplitude compensation circuits 失效
    具有相移和幅度补偿电路的正交调制器

    公开(公告)号:US5367271A

    公开(公告)日:1994-11-22

    申请号:US130551

    申请日:1993-10-01

    IPC分类号: H03H11/18 H04L27/20 H04L27/36

    CPC分类号: H04L27/2071

    摘要: A quadrature modulator includes a 0.degree./90.degree. phase shifter including only resistors, capacitors, and transistors that separates an input carrier wave into two carrier waves having a phase difference of 90.degree. from each other by differentiating and integrating. The quadrature modulator includes amplitude compensating circuits for converting the two carrier waves from sinusoidal waveforms to rectangular waveforms having predetermined amplitudes. The amplitude compensating circuits are inserted between the phase shifter and double-balanced mixers. The phase shifter consists of circuit elements appropriate for circuit integration and produces a high degree of orthogonality in its output signals as a function of variations in the characteristic values of the circuit elements. Complementary carriers having precise orthogonality as well as superior balance are input to double-balanced mixers. Accordingly, a superior modulation wave having fewer spurious components is obtained easily with simplified circuit integration.

    摘要翻译: 正交调制器包括0°/ 90°移相器,其仅包括通过微分和积分将输入载波彼此相差90°的两个载波分离的电阻器,电容器和晶体管。 正交调制器包括用于将两个载波从正弦波形转换成具有预定幅度的矩形波形的幅度补偿电路。 振幅补偿电路插入在移相器和双平衡混频器之间。 移相器由适合于电路集成的电路元件组成,并且在其输出信号中产生高度正交性,作为电路元件的特性值的变化的函数。 具有精确正交性和优异平衡的互补载体输入双平衡混频器。 因此,通过简化的电路集成容易地获得具有较少杂散分量的优良调制波。

    Bias circuit for power amplifier operated by a low external reference voltage
    3.
    发明授权
    Bias circuit for power amplifier operated by a low external reference voltage 有权
    用于功率放大器的偏置电路由低的外部参考电压运行

    公开(公告)号:US07400202B2

    公开(公告)日:2008-07-15

    申请号:US11552635

    申请日:2006-10-25

    IPC分类号: H03F3/04

    CPC分类号: H03F3/189 H03F1/30

    摘要: A bias circuit includes a resistor in parallel with a voltage-drive bias circuit including a GaAs-HBT transistor. This configuration ensures that a current can be supplied from a reference voltage input terminal to the base terminal of a first transistor via the resistor in an idling state in which a voltage applied to the base terminal is lower than a voltage at which a second transistor operates, thereby enabling a desired amplifying operation while maintaining the idling current generally constant in a temperature range, even when the reference voltage is reduced to a value lower than twice the barrier voltage of the GaAs HBT.

    摘要翻译: 偏置电路包括与包括GaAs-HBT晶体管的电压驱动偏置电路并联的电阻器。 这种配置确保了在施加到基极端子的电压低于第二晶体管工作的电压的怠速状态下,可以经由电阻器从参考电压输入端子向第一晶体管的基极端子提供电流 从而即使当基准电压降低到低于GaAs HBT的势垒电压的两倍的值时,也能够在保持空载电流在温度范围内一般保持恒定的期望的放大操作。

    Power amplifier circuit
    4.
    发明授权
    Power amplifier circuit 失效
    功率放大器电路

    公开(公告)号:US5751181A

    公开(公告)日:1998-05-12

    申请号:US797265

    申请日:1997-02-07

    CPC分类号: H03F1/306 H03F1/0261

    摘要: A power amplifier circuit includes a first field effect transistor power amplifier having a gate; a gate voltage supply for supplying a gate voltage to the gate of the first field effect transistor; and a gate voltage control including a second field effect transistor which has the same threshold voltage as the first field effect transistor. The gate voltage control receives, as an input voltage, the gate voltage output from the gate voltage supply, and increases the gate voltage when the gate voltage is lower than the threshold voltage of the first field effect transistor, preventing the first field effect transistor from being pinched off. Therefore, when the pinch-off voltage of the first field effect transistor varies or when the voltage supplied from the gate voltage supply varies, unwanted pinch-off of the first field effect transistor is avoided in the lower power consumption state so that the stability of the circuit is improved.

    摘要翻译: 功率放大器电路包括具有栅极的第一场效应晶体管功率放大器; 用于向第一场效应晶体管的栅极提供栅极电压的栅极电压源; 以及包括具有与第一场效应晶体管相同的阈值电压的第二场效应晶体管的栅极电压控制。 栅极电压控制作为输入电压接收从栅极电压源输出的栅极电压,并且当栅极电压低于第一场效应晶体管的阈值电压时增加栅极电压,从而防止第一场效应晶体管 被掐断 因此,当第一场效应晶体管的截止电压变化时,或当从栅极电压供给的电压变化时,在较低的功耗状态下避免了第一场效应晶体管的不必要的夹断,从而使得稳定性 电路得到改善。

    Image formation apparatus
    5.
    发明授权
    Image formation apparatus 有权
    图像形成装置

    公开(公告)号:US09007605B2

    公开(公告)日:2015-04-14

    申请号:US13473804

    申请日:2012-05-17

    申请人: Kazuya Yamamoto

    发明人: Kazuya Yamamoto

    IPC分类号: G06F3/12 H04N1/00 G06F15/00

    摘要: An image formation apparatus includes an image reading control unit and a print control unit. The print control unit includes: a first communication control unit connected to the image reading control unit; and a power supply control unit configured to control power supply to the image reading control unit. The image reading control unit includes: a second communication control unit connected to the first communication control unit. When completing a process to transition to a power save mode in accordance with an instruction from the print control unit, the image reading control unit cuts off the communications through the second communication control unit. After sending the image reading control unit the instruction to transition to the power save mode, the print control unit detects the cutoff of the communications and then cuts off the power supply to the image reading control unit through the power supply control unit.

    摘要翻译: 图像形成装置包括图像读取控制单元和打印控制单元。 打印控制单元包括:连接到图像读取控制单元的第一通信控制单元; 以及电源控制单元,被配置为控制对所述图像读取控制单元的电力供应。 图像读取控制单元包括:连接到第一通信控制单元的第二通信控制单元。 当完成根据来自打印控制单元的指令转换到省电模式的处理时,图像读取控制单元通过第二通信控制单元切断通信。 在将图像读取控制单元发送到转换到省电模式的指令之后,打印控制单元检测通信的截止,然后通过电源控制单元切断对图像读取控制单元的电源。

    Sheet processing apparatus with pressing unit
    7.
    发明授权
    Sheet processing apparatus with pressing unit 有权
    带加压单元的片材处理设备

    公开(公告)号:US08870176B2

    公开(公告)日:2014-10-28

    申请号:US13371717

    申请日:2012-02-13

    申请人: Kazuya Yamamoto

    发明人: Kazuya Yamamoto

    摘要: A sheet processing apparatus includes: a stacking unit that stacks conveyed sheets; an aligning unit that aligns the sheets stacked on the stacking unit in a sheet conveying direction; a binding unit that moves along an end portion of a bundle of the sheets on a binding portion side and performs a binding process for the bundle of the sheets that have been aligned by the aligning unit; a pressing unit that presses the bundle of the sheets at the end portion thereof on the binding portion side; and an interlocking unit that moves the pressing unit in association with a motion of the binding unit.

    摘要翻译: 片材处理设备包括:堆叠所输送的片材的堆叠单元; 对准单元,其在片材输送方向上对齐堆叠单元上的片材; 捆绑单元,其沿着捆绑部分侧的纸张束的端部移动,并且对已经对准的对齐单元的纸张束执行装订处理; 按压单元,其在所述装订部分侧的端部处挤压所述片材束; 以及联锁单元,其与所述装订单元的运动相关联地移动所述按压单元。

    Detector circuit and semiconductor device using same
    8.
    发明授权
    Detector circuit and semiconductor device using same 有权
    检测电路和使用其的半导体器件

    公开(公告)号:US08558549B2

    公开(公告)日:2013-10-15

    申请号:US12941134

    申请日:2010-11-08

    IPC分类号: G01R31/00 G01R25/02

    摘要: A detector circuit for detecting degradation in the distortion characteristics of a power amplifier based on signals from both ends of a coupled line of a directional coupler. The detector circuit includes a phase shifter/attenuator for phase shifting and attenuating a signal from a coupled terminal of the coupled line, a differential amplifier for outputting difference between an output signal from the phase shifter/attenuator and a signal from the isolated terminal of the coupled line, a wave detector circuit for converting the difference into a DC signal, and a comparing circuit for determining whether the voltage level of the DC signal exceeds a predetermined level. When degradation in the distortion characteristics of the power amplifier arises, the phase shifter/attenuator phase shifts the signal from the coupled terminal and outputs a signal 180° out of phase with the signal from the isolated terminal.

    摘要翻译: 一种用于根据来自定向耦合器的耦合线的两端的信号来检测功率放大器的失真特性的劣化的检测器电路。 检测器电路包括用于相移和衰减来自耦合线的耦合端的信号的移相器/衰减器,用于输出来自移相器/衰减器的输出信号与来自该移相器/衰减器的隔离端的信号的差分放大器 耦合线,用于将差值转换为DC信号的波检测器电路,以及用于确定DC信号的电压电平是否超过预定电平的比较电路。 当功率放大器的失真特性出现降低时,移相器/衰减器将来自耦合端子的信号相移,并输出与隔离端子信号180°异相的信号。

    Power amplifier
    9.
    发明授权
    Power amplifier 有权
    功率放大器

    公开(公告)号:US08432227B2

    公开(公告)日:2013-04-30

    申请号:US13301955

    申请日:2011-11-22

    IPC分类号: H03F3/04

    摘要: A power amplifier includes: an amplifying element having a base into which input signals are inputted, a collector to which a collector voltage is applied, and an emitter; and a bias circuit supplying a bias current to the base of the amplifying element. The bias circuit includes a bias current lowering circuit which lowers the bias current when the collector voltage is lower than a prescribed threshold value.

    摘要翻译: 功率放大器包括:具有输入信号的基极的放大元件,施加集电极电压的集电极和发射极; 以及向放大元件的基极提供偏置电流的偏置电路。 偏置电路包括偏置电流降低电路,当集电极电压低于规定的阈值时,降低偏置电流。