摘要:
A data coding system for coding data represented by a number of symbols is described. The system includes representing each symbol with a unique digital waveform. All the unique digital waveforms have a duty cycle greater than 50% or a duty cycle less than 50%.
摘要:
A power amplifier includes a first transistor and a first inductor disposed between the first transistor and a voltage source. A first node between the first transistor and the first inductor is an output node. The power amplifier further includes a second inductor disposed between the first transistor and ground The power amplifier further includes a third inductor coupled to a gate of the first transistor and configured as a first AC input. The power amplifier further includes a first phase conditioner inductively coupled to the second inductor and the third inductor and configured to set phases of AC signals across the first inductor and the second inductor in phase. The second inductor is configured to release energy into the first inductor to raise a voltage of the AC signal and raise a power output at the output node.
摘要:
A power amplifier includes a push-pull pair of transistors including a first transistor inductively coupled to a voltage source and coupled to a ground, and a second transistor inductively coupled to the ground and coupled to the voltage source. Gates of the first and the second transistors are AC inputs configured to receive an AC signal having a fundamental frequency. Drain regions of the first and the second transistors are, respectively, first and second output nodes. The power amplifier further includes a capacitor coupled between the first output node and the second output node and where the capacitor is configured as a pathway for cancellation of even harmonic signals of the fundamental frequency of the AC signal.
摘要:
A power amplifier includes a first transistor and a first inductor disposed between the first transistor and a voltage source. A first node between the first transistor and the first inductor is an output node. The power amplifier further includes a second inductor disposed between the first transistor and ground The power amplifier further includes a third inductor coupled to a gate of the first transistor and configured as a first AC input. The power amplifier further includes a first phase conditioner inductively coupled to the second inductor and the third inductor and configured to set phases of AC signals across the first inductor and the second inductor in phase. The second inductor is configured to release energy into the first inductor to raise a voltage of the AC signal and raise a power output at the output node.
摘要:
Circuits, such as a cascode amplifier or low noise amplifier, having terminals and a voltage-controlled and variable inductive load are disclosed. Any such circuit comprises an output terminal and a voltage-controlled and variable inductive loading network. The voltage-controlled and variable inductive loading network comprises a primary inductor having a first primary inductor terminal for coupling to a supply voltage, a second primary inductor terminal coupled to the output terminal, a secondary inductor sharing mutual inductance with the first inductor, and a variable resistance device having one terminal connected to a first secondary inductor terminal and another terminal connected to a second secondary inductor terminal, wherein the variable resistance device being dependant on mutual induction between the primary and secondary inductors provides loading at the output terminal.
摘要:
A differential power amplifier is provided and includes a first pair of transistors. A first transistor is inductively coupled to a voltage source and is connected to a node at a ground reference potential. A second transistor is inductively coupled to the node and is connected to the voltage source. Gates of the transistors are configured to receive an AC signal with a fundamental frequency. Drain of the first and second transistors are respectively first and second output nodes. The output nodes provide a first differential output. A capacitor is connected between the output nodes and provides a pathway for cancellation of even harmonic signals of the fundamental frequency. A second pair of transistors provides a second differential output. A first inductor is connected between the output nodes. A second inductor is connected between output nodes of the second pair of transistors. A combiner is inductively coupled to the inductors.
摘要:
A current mirror includes a bias branch, which includes first and second transistors in series between a voltage source and ground, a voltage divider coupled between the voltage source and ground, an op-amp configured to receive a divided voltage of the voltage divider and a voltage of a node between the first and second transistors, and drive a gate of the second transistor to pull the node to the divided voltage. The current mirror further includes a power amplifier core coupled to the bias branch. The power amplifier core includes first and second drive transistors configured in series between the voltage source and ground. Gates of the first transistor and the first drive transistor are coupled, and gates of the second transistor and the second drive transistor are coupled.
摘要:
Circuits, such as a cascode amplifier or low noise amplifier, having terminals and a voltage-controlled and variable inductive load are disclosed. Any such circuit comprises an output terminal and a voltage-controlled and variable inductive loading network. The voltage-controlled and variable inductive loading network comprises a primary inductor having a first primary inductor terminal for coupling to a supply voltage, a second primary inductor terminal coupled to the output terminal, a secondary inductor sharing mutual inductance with the first inductor, and a variable resistance device having one terminal connected to a first secondary inductor terminal and another terminal connected to a second secondary inductor terminal, wherein the variable resistance device being dependant on mutual induction between the primary and secondary inductors provides loading at the output terminal.
摘要:
The load of the cascode amplifier is varied by connecting another (secondary) load in parallel with the original load. The secondary load is connected through a MOSFET switch. During the High Gain Mode the MOSFET switch is OFF and the secondary load is electrically isolated from the main load, whereas in the Low Gain Mode the switch is turned ON and the secondary load appears across the primary load, reducing the effective load impedance. The secondary load is AC coupled such that the DC bias current does not pass through the secondary load and hence the Noise Figure (NF) and linearity (IIP3) performance are better in the Low Gain Mode. A number of such switchable loads can be connected across the load to obtain programmability.