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公开(公告)号：US06952752B2
公开(公告)日：2005-10-04
申请号：US10683066
申请日：2003-10-14
CPC分类号： G06F3/0613 , G06F3/0601 , G06F3/064 , G06F3/0658 , G06F3/0659 , G06F3/0679 , G06F12/023 , G06F12/0246 , G06F2003/0694 , G06F2212/7208
摘要： A flash memory based file memory device built in an information processing apparatus enables fast file access. The file memory device is provided with a parallel arrangement of memory element groups having a unit erasure block size greater than the data bus width of the memory device and a data access width smaller than the data bus, a file division unit for dividing file data that consists of one or more unit storage data blocks into combined blocks that consists of a combination of arbitrary unit storage data blocks, a data distribution unit for combining arbitrarily data on the data bus in terms of the unit data size equal to the data access width and making the combined data correspondent to an arbitrary combination of memory element groups equal in number to the unit size data, and a control unit for controlling the data distribution unit such that each combined block is stored in the file memory device by being correspondent to one of the arbitrary combinations of memory element groups.
摘要翻译： 内置于信息处理装置中的基于闪速存储器的文件存储装置能够实现文件快速访问。 所述文件存储装置设置有具有大于所述存储装置的数据总线宽度的单位擦除块大小和小于所述数据总线的数据访问宽度的存储元件组的并行布置，用于分割文件数据的文件数据的文件分割单元 由一个或多个单元存储数据块组成由组合的任意单位存储数据块组成的组合块，数据分配单元，用于根据与数据存取宽度相等的单位数据大小在数据总线上任意组合数据，以及 使得组合数据对应于与单位大小数据数量相等的存储单元组的任意组合;以及控制单元，用于控制数据分配单元，使得每个组合块通过对应于 存储元件组的任意组合。
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公开(公告)号：US06351787B2
公开(公告)日：2002-02-26
申请号：US09793967
申请日：2001-02-28
IPC分类号： G06F1200
CPC分类号： G06F3/0613 , G06F3/0601 , G06F3/064 , G06F3/0658 , G06F3/0659 , G06F3/0679 , G06F12/023 , G06F12/0246 , G06F2003/0694 , G06F2212/7208
摘要： A semiconductor file memory device, and an information processing system incorporating the device, uses flash memories to achieve fast file access performance. The file memory device includes a parallel arrangement of memory element groups having a unit erasure block size greater than the data bus width of the memory device, and a data access width smaller than the data bus; a file division unit for dividing file data having one or more unit storage data blocks into combined blocks that include a combination of arbitrary unit storage data blocks; a data distribution unit for arbitrarily combining data on the data bus having a unit data size equal to the data access width, and for making the combined data correspond to an arbitrary combination of memory element groups equal in number to the unit size data; and a control unit for controlling the data distribution unit so that each combined block is stored in the file memory device based on a correspondence between the combined block and arbitrary combinations of memory elements.
摘要翻译： 半导体文件存储装置以及包含该装置的信息处理系统使用闪速存储器来实现快速的文件访问性能。 所述文件存储装置包括具有大于所述存储装置的数据总线宽度的单位擦除块大小的存储元件组的并行布置以及小于所述数据总线的数据访问宽度; 文件分割单元，用于将具有一个或多个单元存储数据块的文件数据分成包括任意单位存储数据块的组合的组合块; 数据分配单元，用于任意组合数据总线上具有与数据访问宽度相等的单位数据大小的数据，并且用于使组合数据对应于与单位大小数据相等的存储单元组的任意组合; 以及控制单元，用于基于组合块和存储元件的任意组合之间的对应关系来控制数据分配单元，使得每个组合块被存储在文件存储设备中。
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公开(公告)号：US06662264B2
公开(公告)日：2003-12-09
申请号：US10023701
申请日：2001-12-21
IPC分类号： G06F1200
CPC分类号： G06F3/0613 , G06F3/0601 , G06F3/064 , G06F3/0658 , G06F3/0659 , G06F3/0679 , G06F12/023 , G06F12/0246 , G06F2003/0694 , G06F2212/7208
摘要： A semiconductor file memory device, and an information processing system incorporating the device, uses flash memories to achieve fast file access performance. The file memory device includes a parallel arrangement of memory element groups having a unit erasure block size greater than the data bus width of the memory device, and a data access width smaller than the data bus; a file division unit for dividing file data having one or more unit storage data blocks into combined blocks that include a combination of arbitrary unit storage data blocks; a data distribution unit for arbitrarily combining data on the data bus having a unit data size equal to the data access width, and for making the combined data correspond to an arbitrary combination of memory element groups equal in number to the unit size data; and a control unit for controlling the data distribution unit so that each combined block is stored in the file memory device based on a correspondence between the combined block and arbitrary combinations of memory elements.
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4.发明授权File memory device using flash memories, and an information processing system using the same 失效使用闪速存储器的文件存储器件，以及使用其的信息处理系统公开(公告)号：US06272610B1
公开(公告)日：2001-08-07
申请号：US08207749
申请日：1994-03-09
IPC分类号： G06F1200
CPC分类号： G06F3/0613 , G06F3/0601 , G06F3/064 , G06F3/0658 , G06F3/0659 , G06F3/0679 , G06F12/023 , G06F12/0246 , G06F2003/0694 , G06F2212/7208
摘要： A semiconductor file memory device, and an information processing system incorporating the device, uses flash memories to achieve fast file access performance. The file memory device includes a parallel arrangement of memory element groups having a unit erasure block size greater than the data bus width of the memory device, and a data access width smaller than the data bus; a file division unit for dividing file data having one or more unit storage data blocks into combined blocks that include a combination of arbitrary unit storage data blocks; a data distribution unit for arbitrarily combining data on the data bus having a unit data size equal to the data access width, and for making the combined data correspond to an arbitrary combination of memory element groups equal in number to the unit size data; and a control unit for controlling the data distribution unit so that each combined block is stored in the file memory device based on a correspondence between the combined block and arbitrary combinations of memory elements.
摘要翻译： 半导体文件存储装置以及包含该装置的信息处理系统使用闪速存储器来实现快速的文件访问性能。 所述文件存储装置包括具有大于所述存储装置的数据总线宽度的单位擦除块大小的存储元件组的并行布置以及小于所述数据总线的数据访问宽度; 文件分割单元，用于将具有一个或多个单元存储数据块的文件数据分成包括任意单位存储数据块的组合的组合块; 数据分配单元，用于任意组合数据总线上具有与数据访问宽度相等的单位数据大小的数据，并且用于使组合数据对应于与单位大小数据相等的存储单元组的任意组合; 以及控制单元，用于基于组合块和存储元件的任意组合之间的对应关系来控制数据分配单元，使得每个组合块被存储在文件存储装置中。
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公开(公告)号：US06275436B1
公开(公告)日：2001-08-14
申请号：US09577371
申请日：2000-05-23
申请人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
发明人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
IPC分类号： G11C800
CPC分类号： G11C29/765 , G06F3/0601 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0644 , G06F3/0656 , G06F3/0679 , G06F3/068 , G06F11/1433 , G06F11/1441 , G06F12/08 , G06F12/0802 , G06F12/0866 , G06F2003/0694 , G06F2212/2022 , G06F2212/312 , G11C29/789 , G11C29/82
摘要： A control method and system when a flash memory is used. as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller comprises control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address. The control section is responsive to the interface information, the first management information, and the second management information for controlling input/output of data from/to the external system and for temporarily storing write data into the first nonvolatile memory from the external system in the volatile memory and then transferring the write data from the volatile memory to the first nonvolatile memory. The consecutive address generation means and the sector address storage means output the physical sector address and the consecutively generated addresses to the first nonvolatile memory and the volatile memory when data at the physical sector address is output from the first nonvolatile memory or when data at the physical sector address is input to the volatile memory.
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公开(公告)号：US06421279B1
公开(公告)日：2002-07-16
申请号：US09927493
申请日：2001-08-13
申请人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
发明人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
IPC分类号： G11C800
CPC分类号： G11C29/765 , G06F3/0601 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0644 , G06F3/0656 , G06F3/0679 , G06F3/068 , G06F11/1433 , G06F11/1441 , G06F12/08 , G06F12/0802 , G06F12/0866 , G06F2003/0694 , G06F2212/2022 , G06F2212/312 , G11C29/789 , G11C29/82
摘要： A semiconductor file system features a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating correspondence between physical and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information. The controller determines a physical sector address. The control section is for controlling input/output of data from/to the external system and for temporarily storing write data into the first nonvolatile memory from the external system in the volatile memory and then transferring the write data from the volatile memory to the first nonvolatile memory.
摘要翻译： 半导体文件系统具有电可擦除的第一非易失性存储器，不电可擦除的第二非易失性存储器，易失性存储器，控制器和控制部分，其控制控制器，其中对应于从外部系统指定的逻辑地址的物理地址是 访问。 第一非易失性存储器存储用于执行操作的外部系统的数据，指示物理和逻辑地址之间的对应关系的第一管理信息以及指示第一非易失性存储器的状态的第二管理信息。 第二非易失性存储器先前存储接口信息。 控制器确定物理扇区地址。 控制部分用于控制来自/外部系统的数据的输入/输出，并用于从易失性存储器中的外部系统暂时将写数据存储到第一非易失性存储器中，然后将写入数据从易失性存储器传送到第一非易失性存储器 记忆。
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公开(公告)号：US6078520A
公开(公告)日：2000-06-20
申请号：US357931
申请日：1999-07-21
申请人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
发明人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
CPC分类号： G11C29/765 , G06F11/1433 , G06F12/08 , G06F12/0802 , G06F12/0866 , G11C29/789 , G11C29/82 , G06F2212/2022 , G06F2212/312
摘要： A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller has a control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address.
摘要翻译： 当闪存用作信息处理系统中的半导体盘或主存储器时的控制方法和系统。 半导体文件系统包括电可擦除的第一非易失性存储器，不电可擦除的第二非易失性存储器，易失性存储器，控制存储器的控制器和控制控制器的控制部分，其中对应于由 访问一个外部系统。 第一非易失性存储器存储用于执行操作的外部系统的数据，指示存储数据的物理地址与逻辑地址之间的对应关系的第一管理信息，以及指示第一非易失性存储器的状态的第二管理信息。 第二非易失性存储器预先存储从外部系统输入和输出数据所需的接口信息以及数据的只读数据。 控制器具有控制装置，用于当数据从第一非易失性存储器输出时或当数据被输入到易失性存储器时，确定形成物理地址的预定高位的物理扇区地址，用于存储确定的物理扇区地址的装置， 以及用于在由所述物理扇区地址确定的扇区中连续生成地址的装置。
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公开(公告)号：US5973964A
公开(公告)日：1999-10-26
申请号：US182630
申请日：1998-10-30
申请人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
发明人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
CPC分类号： G11C29/765 , G06F11/1433 , G06F11/1441 , G06F12/08 , G06F12/0802 , G06F12/0866 , G06F3/0601 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0644 , G06F3/0656 , G06F3/0679 , G06F3/068 , G11C29/789 , G11C29/82 , G06F2003/0694 , G06F2212/2022 , G06F2212/312
摘要： A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller has a control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address.
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公开(公告)号：US5862083A
公开(公告)日：1999-01-19
申请号：US640998
申请日：1996-04-30
申请人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
发明人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
CPC分类号： G11C29/765 , G06F11/1433 , G06F11/1441 , G06F12/08 , G06F12/0802 , G06F12/0866 , G06F3/0601 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0644 , G06F3/0656 , G06F3/0679 , G06F3/068 , G11C29/789 , G11C29/82 , G06F2003/0694 , G06F2212/2022 , G06F2212/312
摘要： A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller comprises control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address.
摘要翻译： 当闪存用作信息处理系统中的半导体盘或主存储器时的控制方法和系统。 半导体文件系统包括电可擦除的第一非易失性存储器，不电可擦除的第二非易失性存储器，易失性存储器，控制存储器的控制器和控制控制器的控制部分，其中对应于由 访问一个外部系统。 第一非易失性存储器存储用于执行操作的外部系统的数据，指示存储数据的物理地址与逻辑地址之间的对应关系的第一管理信息，以及指示第一非易失性存储器的状态的第二管理信息。 第二非易失性存储器预先存储从外部系统输入和输出数据所需的接口信息以及数据的只读数据。 控制器包括控制装置，用于当数据从第一非易失性存储器输出时或当数据被输入到易失性存储器时，确定形成物理地址的预定高位的物理扇区地址，存储确定的物理扇区地址的装置，以及 用于连续地产生由物理扇区地址确定的扇区中的地址的装置。
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公开(公告)号：US5530673A
公开(公告)日：1996-06-25
申请号：US225313
申请日：1994-04-08
申请人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
发明人： Tsunehiro Tobita , Jun Kitahara , Takashi Tsunehiro , Kunihiro Katayama , Ryuichi Hattori , Yukihiro Seki , Hajime Yamagami , Takashi Totsuka , Takeshi Wada , Yosio Takaya , Manabu Saito , Kenichi Kaki , Takao Okubo , Takashi Kikuchi , Masamichi Kishi , Takeshi Suzuki , Shigeru Kadowaki
CPC分类号： G11C29/765 , G06F11/1433 , G06F11/1441 , G06F12/08 , G06F12/0802 , G06F12/0866 , G06F3/0601 , G06F3/0613 , G06F3/0616 , G06F3/064 , G06F3/0644 , G06F3/0656 , G06F3/0679 , G06F3/068 , G11C29/789 , G11C29/82 , G06F2003/0694 , G06F2212/2022 , G06F2212/312
摘要： A control method and system when a flash memory is used as a semiconductor disk or a main memory in an information processing system. A semiconductor file system comprises a first nonvolatile memory electrically erasable, a second nonvolatile memory not electrically erasable, a volatile memory, a controller which controls the memories, and a control section which controls the controller wherein a physical address corresponding to a logical address specified from an external system is accessed. The first nonvolatile memory stores data for the external system to perform operations, first management information indicating the correspondence between physical addresses at which the data is stored and logical addresses, and second management information indicating a state of the first nonvolatile memory. The second nonvolatile memory previously stores interface information required for inputting and outputting the data from and to the external system and read-only data of the data. The controller comprises control means for determining a physical sector address forming predetermined high-order bits of the physical address when data is output from the first nonvolatile memory or when data is input to the volatile memory, means for storing the determined physical sector address, and means for consecutively generating addresses in a sector determined by the physical sector address.
摘要翻译： 当闪存用作信息处理系统中的半导体盘或主存储器时的控制方法和系统。 半导体文件系统包括电可擦除的第一非易失性存储器，不电可擦除的第二非易失性存储器，易失性存储器，控制存储器的控制器和控制控制器的控制部分，其中对应于由 访问一个外部系统。 第一非易失性存储器存储用于执行操作的外部系统的数据，指示存储数据的物理地址与逻辑地址之间的对应关系的第一管理信息，以及指示第一非易失性存储器的状态的第二管理信息。 第二非易失性存储器预先存储从外部系统输入和输出数据所需的接口信息以及数据的只读数据。 控制器包括控制装置，用于当数据从第一非易失性存储器输出时或当数据被输入到易失性存储器时，确定形成物理地址的预定高位的物理扇区地址，存储确定的物理扇区地址的装置，以及 用于连续地产生由物理扇区地址确定的扇区中的地址的装置。
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