摘要:
A method for forming a polysilicon germanium layer on a gate oxide layer without forming a polysilicon seed layer previously is disclosed. The method uses a chemical vapor deposition process at a temperature range between about 500° C. to about 600° C. by using a Si2H6 (disilane) gas and a germanium-containing gas as precursors to form a polysilicon germanium layer on a gate dielectric layer as a gate electrode layer. The polysilicon germanium layer directly formed on the gate dielectric layer has a smooth surface.
摘要翻译:公开了一种在不形成多晶硅种子层的情况下在栅极氧化物层上形成多晶硅锗层的方法。 该方法在约500℃至约600℃的温度范围内使用化学气相沉积工艺,使用Si 2 H 6 H 6(乙硅烷)气体和 作为前驱体的含锗气体作为栅极电极层在栅极电介质层上形成多晶硅锗层。 直接形成在栅介质层上的多晶硅锗层具有光滑的表面。
摘要:
A handheld electronic device includes a main body, an antenna, a gravity sensor and a control circuit. The main body has an operation surface. The operation surface has a first side and a second side opposite to each other. The antenna is disposed in the main body and located near the first side. The gravity sensor is disposed in the main body and capable of sensing a tilted state of the main body relative to a gravity direction. The control circuit is electrically connected to the antenna and the gravity sensor. When a position of the first side is higher than a position of the second side and an included angle between the operation surface and the gravity direction is between 0 degree and a predetermined value, the control circuit increases power of the antenna.
摘要:
A metal gate structure is disclosed. The metal gate structure includes: a semiconductor substrate having an active region and an isolation region; an isolation structure disposed in the isolation region; a first gate structure disposed on the active region; and a second gate structure disposed on the isolation structure, wherein the height of the second gate structure is different from the height of the first gate structure.
摘要:
A method for forming a semiconductor element structure is provided. First, a substrate including a first MOS and a second MOS is provided. The gate electrode of the first MOS is connected to the gate electrode of the second MOS, wherein the first MOS includes a first high-K material and a first metal for use in a first gate, and a second MOS includes a second high-K material and a second metal for use in a second gate. Then the first gate and the second gate are partially removed to form a connecting recess. Afterwards, the connecting recess is filled with a conductive material to form a bridge channel for electrically connecting the first metal and the second metal.
摘要:
A metal oxide semiconductor (MOS) transistor with a Y structure metal gate is provided. The MOS transistor includes a substrate, a Y structure metal gate positioned on the substrate, two doping regions disposed in the substrate on two sides of the Y structure metal structure, a spacer, an insulating layer positioned outside the spacer, a dielectric layer positioned outside the insulating layer and a bevel edge covering the spacer. The spacer has a vertical sidewall, and the vertical sidewall surrounds a recess. A part of the Y structure metal gate is disposed in the recess, and a part of the Y structure metal gate is positioned on the bevel edge.
摘要:
A method of forming a gate dielectric is described. A plasma treatment process is performed to form a dielectric structure on a substrate, wherein the dielectric structure having a graded dielectric constant value that decreases gradually in a direction toward the substrate.
摘要:
A method for fabricating metal gate transistor is disclosed. First, a substrate having a first transistor region and a second transistor region is provided. Next, a stacked film is formed on the substrate, in which the stacked film includes at least one high-k dielectric layer and a first metal layer. The stacked film is patterned to form a plurality of gates in the first transistor region and the second transistor region, a dielectric layer is formed on the gates, and a portion of the dielectric layer is planarized until reaching the top of each gates. The first metal layer is removed from the gate of the second transistor region, and a second metal layer is formed over the surface of the dielectric layer and each gate for forming a plurality of metal gates in the first transistor region and the second transistor region.
摘要:
A method for fabricating metal gate transistors and a polysilicon resistor is disclosed. First, a substrate having a transistor region and a resistor region is provided. A polysilicon layer is then formed on the substrate to cover the transistor region and the resistor region of the substrate. Next, a portion of the polysilicon layer disposed in the resistor is removed, and the remaining polysilicon layer is patterned to create a step height between the surface of the polysilicon layer disposed in the transistor region and the surface of the polysilicon layer disposed in the resistor region.
摘要:
An electronic device is provided. The electronic device includes a housing, a rotating mechanism and a first rotating member. The rotating mechanism, rotatably disposed in the housing, rotatable along a first direction and a second direction different from the first direction. The first rotating member, disposed on the housing, rotatable between a first position and a second position. When the first rotating member is in the first position, the first rotating member engages with the rotating mechanism. When the rotating mechanism rotates along the first direction, the rotating mechanism is separated from the first rotating member, whereinafter, the first rotating member is able to rotate from the first position to the second position.
摘要:
A metal gate transistor is disclosed. The metal gate transistor preferably includes: a substrate, a metal gate disposed on the substrate, and a source/drain region disposed in the substrate with respect to two sides of the metal gate. The metal gate includes a U-shaped high-k dielectric layer, a U-shaped cap layer disposed over the surface of the U-shaped high-k dielectric layer, and a U-shaped metal layer disposed over the U-shaped cap layer.