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公开(公告)号：US11723153B2
公开(公告)日：2023-08-08
申请号：US17653054
申请日：2022-03-01
Applicant: LG INNOTEK CO., LTD.
Inventor： Yun Mi Bae , Soon Gyu Kwon , Sang Hwa Kim , Sang Young Lee , Jin Hak Lee , Han Su Lee , Dong Hun Jeong , In Ho Jeong , Dae Young Choi , Jung Ho Hwang
IPC: H05K1/11 , H05K3/24 , H05K3/18 , H05K3/10 , H05K1/02 , C25D3/48 , C25D5/02 , C25D5/48 , C25D7/12 , H05K1/09 , C25D3/38
CPC classification number: H05K3/244 , C25D3/48 , C25D5/022 , C25D5/48 , C25D7/123 , H05K1/0296 , H05K1/09 , H05K1/11 , H05K3/108 , H05K3/181 , H05K3/188 , C25D3/38 , H05K2201/0338 , H05K2201/098 , H05K2201/099 , H05K2201/0989 , H05K2203/1184
Abstract: A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.
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公开(公告)号：US11019731B2
公开(公告)日：2021-05-25
申请号：US17005522
申请日：2020-08-28
Applicant: LG INNOTEK CO., LTD.
Inventor： Yun Mi Bae , Soon Gyu Kwon , Sang Hwa Kim , Sang Young Lee , Jin Hak Lee , Han Su Lee , Dong Hun Jeong , In Ho Jeong , Dae Young Choi , Jung Ho Hwang
IPC: H05K1/11 , H05K1/02 , H05K3/24 , H05K3/18 , H05K3/10 , C25D3/48 , C25D5/02 , C25D5/48 , C25D7/12 , H05K1/09 , C25D3/38
Abstract: A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.
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公开(公告)号：US10531569B2
公开(公告)日：2020-01-07
申请号：US15878701
申请日：2018-01-24
Applicant: LG INNOTEK CO., LTD.
Inventor： Yun Mi Bae , Soon Gyu Kwon , Sang Hwa Kim , Sang Young Lee , Jin Hak Lee , Han Su Lee , Dong Hun Jeong , In Ho Jeong , Dae Young Choi , Jung Ho Hwang
IPC: H05K1/11 , H05K3/24 , H05K3/18 , H05K3/10 , H05K1/09 , C25D3/48 , C25D5/02 , C25D5/48 , C25D7/12 , C25D3/38
Abstract: A printed circuit board includes: an insulating layer; a plating seed layer disposed on the insulating layer; a circuit pattern layer disposed on the plating seed layer and formed of copper (Cu); and a surface treatment layer disposed on the circuit pattern layer and formed of gold (Au), wherein the circuit pattern layer includes a corner portion of an upper portion which has a curvature, and wherein the corner portion of the circuit pattern layer is a boundary surface between the top surface and a side surface of the circuit pattern layer, and the boundary surface has a concavely curved surface.
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公开(公告)号：US09913383B2
公开(公告)日：2018-03-06
申请号：US15594778
申请日：2017-05-15
Applicant: LG INNOTEK CO., LTD.
Inventor： Yun Mi Bae , Soon Gyu Kwon , Sang Hwa Kim , Sang Young Lee , Jin Hak Lee , Han Su Lee , Dong Hun Jeong , In Ho Jeong , Dae Young Choi , Jung Ho Hwang
CPC classification number: H05K1/11 , C25D3/38 , C25D3/48 , C25D5/022 , C25D5/48 , C25D7/123 , H05K1/09 , H05K3/108 , H05K3/181 , H05K3/188 , H05K3/244 , H05K2201/0338 , H05K2201/098 , H05K2201/0989 , H05K2201/099 , H05K2203/1184
Abstract: A printed circuit board includes: an insulating layer; a plating seed layer disposed on the insulating layer; a circuit pattern layer disposed on the plating seed layer and formed of copper (Cu); and a surface treatment layer disposed on the circuit pattern layer and formed of gold (Au), wherein a width of a bottom surface of the surface treatment layer is narrower than a width of a top surface of the plating seed layer, wherein the bottom surface of the surface treatment layer includes: a first portion contacted with the circuit pattern layer; and a second portion non contacted with the circuit pattern layer, and wherein a width of a top surface of the circuit pattern layer is narrower than a width of a bottom surface of the circuit pattern layer.
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公开(公告)号：US20170135223A1
公开(公告)日：2017-05-11
申请号：US15406132
申请日：2017-01-13
Applicant: LG INNOTEK CO., LTD.
Inventor： Jung Ho Hwang , Han Su Lee , Dae Young Choi , Soon Gyu Kwon , Dong Hun Jeong , In Ho Jeong , Kil Dong Son , Sang Hwa Kim , Sang Young Lee , Jae Hoon Jeon , Jin Hak Lee , Yun Mi Bae
CPC classification number: H05K3/188 , H05K1/0298 , H05K1/09 , H05K3/002 , H05K3/108 , H05K3/244 , H05K2201/0347 , H05K2201/098 , H05K2203/0548 , H05K2203/0588 , H05K2203/0723 , H05K2203/1184
Abstract: Disclosed are a printed circuit board and a method of manufacturing the printed circuit board. The printed circuit board includes an insulating layer, and a circuit pattern formed on the insulating layer, wherein the circuit pattern includes a first circuit pattern formed on the insulating layer and including a corner portion of an upper portion which has a predetermined curvature and a second circuit pattern formed on the first circuit pattern and configured to cover an upper surface of the first circuit pattern including the corner portion.
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Patent Agency Ranking
公开(公告)号：US12232273B2
公开(公告)日：2025-02-18
申请号：US18337706
申请日：2023-06-20
Applicant: LG INNOTEK CO., LTD.
Inventor： Yun Mi Bae , Soon Gyu Kwon , Sang Hwa Kim , Sang Young Lee , Jin Hak Lee , Han Su Lee , Dong Hun Jeong , In Ho Jeong , Dae Young Choi , Jung Ho Hwang
IPC: H05K1/02 , C25D3/48 , C25D5/02 , C25D5/48 , C25D7/12 , H05K1/09 , H05K1/11 , H05K3/10 , H05K3/18 , H05K3/24 , C25D3/38
Abstract: A printed circuit board includes an insulating layer, a circuit pattern on the insulating layer, and a surface treatment layer on the circuit pattern. The surface treatment layer includes a bottom surface having a width wider than a width of a top surface of the circuit pattern.
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公开(公告)号：US20170055347A1
公开(公告)日：2017-02-23
申请号：US15241714
申请日：2016-08-19
Applicant: LG INNOTEK CO., LTD.
Inventor： Jung Ho Hwang , Han Su Lee , Dae Young Choi , Soon Gyu Kwon , Dong Hun Jeong , In Ho Jeong , Kil Dong Son , Sang Hwa Kim , Sang Young Lee , Jae Hoon Jeon , Jin Hak Lee , Yun Mi Bae
CPC classification number: H05K3/188 , H05K1/0298 , H05K1/09 , H05K3/002 , H05K3/108 , H05K3/244 , H05K2201/0347 , H05K2201/098 , H05K2203/0548 , H05K2203/0588 , H05K2203/0723 , H05K2203/1184
Abstract: Disclosed are a printed circuit board and a method of manufacturing the printed circuit board. The printed circuit board includes an insulating layer, and a circuit pattern formed on the insulating layer, wherein the circuit pattern includes a first circuit pattern formed on the insulating layer and including a corner portion of an upper portion which has a predetermined curvature and a second circuit pattern formed on the first circuit pattern and configured to cover an upper surface of the first circuit pattern including the corner portion.
Abstract translation: 公开了印刷电路板和制造印刷电路板的方法。 印刷电路板包括绝缘层和形成在绝缘层上的电路图案，其中电路图案包括形成在绝缘层上并包括具有预定曲率的上部的角部的第一电路图案， 电路图案形成在第一电路图案上并且被配置为覆盖包括拐角部分的第一电路图案的上表面。
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公开(公告)号：US11889634B2
公开(公告)日：2024-01-30
申请号：US17135223
申请日：2020-12-28
Applicant: LG INNOTEK CO., LTD.
Inventor： Jung Ho Hwang , Han Su Lee , Dae Young Choi , Soon Gyu Kwon , Dong Hun Jeong , In Ho Jeong , Kil Dong Son , Sang Hwa Kim , Sang Young Lee , Jae Hoon Jeon , Jin Hak Lee , Yun Mi Bae
IPC: H05K1/11 , H05K3/18 , H05K1/02 , H05K1/09 , H05K3/10 , H05K3/46 , H05K3/00 , H05K3/24 , H01L23/00
CPC classification number: H05K3/188 , H05K1/0298 , H05K1/09 , H05K3/002 , H05K3/108 , H05K3/184 , H05K3/467 , H05K3/4661 , H01L24/11 , H01L24/12 , H05K1/111 , H05K3/244 , H05K2201/0347 , H05K2201/098 , H05K2203/0548 , H05K2203/0588 , H05K2203/0723 , H05K2203/1184 , Y10T29/49147
Abstract: A method of manufacturing a printed circuit board includes providing an insulating layer, forming a plating seed layer on the insulating layer, forming a first circuit pattern on the plating seed layer and a second circuit pattern on the first circuit pattern, and forming a top metal layer on the second circuit pattern. The second circuit pattern can be thinner than the first circuit pattern, and the top metal layer can be wider than the second circuit pattern.
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公开(公告)号：US10912202B2
公开(公告)日：2021-02-02
申请号：US15406132
申请日：2017-01-13
Applicant: LG INNOTEK CO., LTD.
Inventor： Jung Ho Hwang , Han Su Lee , Dae Young Choi , Soon Gyu Kwon , Dong Hun Jeong , In Ho Jeong , Kil Dong Son , Sang Hwa Kim , Sang Young Lee , Jae Hoon Jeon , Jin Hak Lee , Yun Mi Bae
IPC: H05K3/18 , H05K3/46 , H01K1/02 , H05K1/02 , H05K1/09 , H05K3/10 , H05K3/00 , H05K3/24 , H01L23/00
Abstract: A method of manufacturing a printed circuit board includes providing an insulating layer, forming a plating seed layer on the insulating layer, forming a first circuit pattern on the plating seed layer and a second circuit pattern on the first circuit pattern, and forming a top metal layer on the second circuit pattern. The second circuit pattern can be thinner than the first circuit pattern, and the top metal layer can be wider than the second circuit pattern.
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公开(公告)号：US09820378B2
公开(公告)日：2017-11-14
申请号：US15241714
申请日：2016-08-19
Applicant: LG INNOTEK CO., LTD.
Inventor： Jung Ho Hwang , Han Su Lee , Dae Young Choi , Soon Gyu Kwon , Dong Hun Jeong , In Ho Jeong , Kil Dong Son , Sang Hwa Kim , Sang Young Lee , Jae Hoon Jeon , Jin Hak Lee , Yun Mi Bae
CPC classification number: H05K3/188 , H05K1/0298 , H05K1/09 , H05K3/002 , H05K3/108 , H05K3/244 , H05K2201/0347 , H05K2201/098 , H05K2203/0548 , H05K2203/0588 , H05K2203/0723 , H05K2203/1184
Abstract: Disclosed are a printed circuit board and a method of manufacturing the printed circuit board. The printed circuit board includes an insulating layer, and a circuit pattern formed on the insulating layer, wherein the circuit pattern includes a first circuit pattern formed on the insulating layer and including a corner portion of an upper portion which has a predetermined curvature and a second circuit pattern formed on the first circuit pattern and configured to cover an upper surface of the first circuit pattern including the corner portion.
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